Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

A 1-V 3.8 - 5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology

Abstract: In this paper, a 1-V 3.8 - 5.7-GHz wide-band voltage-controlled oscillator (VCO) in a 0.13-/spl mu/m silicon-on-insulator (SOI) CMOS process is presented. This VCO features differentially tuned accumulation MOS varactors that: 1) provide 40% frequency tuning when biased between 0 - 1 V and 2) diminish the adverse effect of high varactor sensitivity through rejection of common-mode noise. This paper shows that, for differential LC VCOs, all low-frequency noise such as flicker noise can be considered to be common-mode noise, and differentially tuned varactors can be used to suppress common-mode noise from being upconverted to the carrier frequency. The noise rejection mechanism is explained, and the technological advantages of SOI over bulk CMOS in this regard is discussed. At 1-MHz offset, the measured phase noise is -121.67 dBc/Hz at 3.8 GHz, and -111.67 dBc/Hz at 5.7 GHz. The power dissipation is between 2.3 - 2.7-mW, depending on the center frequency, and the buffered output power is -9 dBm. Due to the noise rejection, the VCO is able to operate at very low voltage and low power. At a supply voltage of 0.75 V, the VCO only dissipates 0.8 mW at 5.5 GHz.

A Study of SiGe HBT Signal Sources in the 220–330-GHz Range

Abstract: The paper presents design optimization strategies and a comparison of the performance of SiGe HBT fundamental and push-push Colpitts and Colpitts-Clapp voltage-controlled oscillators (VCOs), with and without doublers and buffers, as possible solutions for efficient milliwatt-level, low-noise signal sources at submillimeter-wave frequencies. The fundamental frequency Colpitts VCO covers a 12% tuning range between 218 and 246 GHz (the highest for SiGe HBTs) with up to -3.6-dBm output power and 0.8% efficiency. The 300-GHz signal source, consisting of a Colpitts-Clapp VCO followed by a buffer amplifier and a doubler, shows -1.7-dBm output power around 290 GHz, -101-dBc/Hz phase noise at 10-MHz offset, 7.5% tuning range, and 0.4% efficiency. Finally, the push-push Colpitts-Clapp VCO exhibits the highest operation frequency, from 309 to 325 GHz, but with reduced efficiency of only 0.07% and 5% tuning range. It was concluded that the differential cascode buffer placed between the VCO and doubler was instrumental in achieving the best phase noise and output power with good efficiency and without compromising tuning range.

Subharmonic quadrature sampling receiver and design

Abstract: A receiver for down-converting a modulated carrier into its in-phase (I) and quadrature (Q) components for further processing is proposed. This is accomplished using a sampling method in which the signal is sampled directly using a sampling circuit which is driven by a single sampling clock frequency substantially lower than the carrier frequency while allowing the I and Q components to be precisely obtained. Each of the signal samples comprises sub-samples taken successively which represent the in-phase, quadrature, negative in-phase and negative quadrature components of the signal. The negative components permit flexible application of the invention in several modes, including differential mode for the removal of common-mode noise. The invention is useful because it provides an integrated circuit means for precisely obtaining I and Q components of a very high frequency modulated carrier. This greatly eases the difficulty of implementing receiver architectures such as direct down-conversion or low-IF receivers, which permit on-chip integration of traditionally difficult-to-integrate components such as IF filters and VCO circuits while eliminating the need for image-rejection filters.

A method to derive an equation for the oscillation frequency of a ring oscillator

Abstract: A new method for deriving an equation for the oscillation frequency of a ring oscillator is proposed. The method is general enough to be used for a variety of types of delay stages. Furthermore, it provides a framework to include various parasitic and secondary effects. The method is used to derive an equation for a common ring oscillator topology. The validity of the method and the resulting equation have been verified through simulation. The oscillation frequencies predicted by the proposed method are more accurate than existing equations and account for more secondary effects.

A low-phase-noise CMOS LC oscillator with a ring structure

Abstract: This LC ring oscillator is an architectural experiment to reduce the phase noise of an LC oscillator even further with a ring type structure. An LC oscillator with a special ring type structure performs phase noise filtering and attenuation. To prove the concept, several LC-ring oscillators are fabricated in 0.6 /spl mu/m, single-poly, triple-metal, CMOS. The three-stage LC-ring oscillator has -132 dBc/Hz measured phase noise at 600 kHz offset frequency from a 900 MHz carrier.