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Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.


Papers
More filters
Journal ArticleDOI
TL;DR: A 7-GHz CMOS voltage controlled ring oscillator that employs multiloop technique for frequency boosting is presented in this paper, which permits lower tuning gain through the use of coarse/fine frequency control.
Abstract: A 7-GHz CMOS voltage controlled ring oscillator that employs multiloop technique for frequency boosting is presented in this paper. The circuit permits lower tuning gain through the use of coarse/fine frequency control. The lower tuning gain also translates into a lower sensitivity to the voltage at the control lines. Fabricated in a standard 0.13-mum CMOS process, the proposed voltage-controlled ring oscillator exhibits a low phase noise of -103.4 dBc/Hz at 1 MHz offset from the center frequency of 7.64 GHz, while consuming a current of 40 mA excluding the buffer.

86 citations

Journal ArticleDOI
TL;DR: In this paper, a two-stage digitally controlled ring oscillator designed mainly for impulse-radio ultra-wideband (UWB) applications is presented, where each basic stage utilizes a local positive feedback, allowing to achieve steady oscillation at low current consumption levels, and to extend the frequency tuning over an ultra wide range.
Abstract: We present a two-stage digitally controlled ring oscillator designed mainly for impulse-radio ultra-wideband (UWB) applications. Each basic stage utilizes a local positive feedback, allowing to achieve steady oscillation at low current consumption levels, and to extend the frequency tuning over an ultra-wide range. The frequency tuning is achieved via the control of the tail resistor in each stage. The circuit is fabricated in a 0.13-mum CMOS technology. It features full UWB coverage at slightly higher than 1.3-V supply voltage, -121.7-dBc/Hz phase noise at a 5.6-GHz carrier, and 10-MHz offset, and less than 5-mW power consumption for the digitally controlled oscillator core alone at 10.18-GHz maximum frequency under 1.3-V supply voltage.

86 citations

Patent
14 Apr 2003
TL;DR: In this article, a frequency synthesizer, a calibrator thereof, and an operating controller thereof are described, which comprises a main charge pump that drives a voltage controlled oscillator (VCO) through a loop filter.
Abstract: A frequency synthesizer, a calibrator thereof, and an operating controller thereof are described. The synthesizer comprises a main charge pump that drives a voltage controlled oscillator (VCO) through a loop filter. The calibrator includes a second, replica charge pump that can also drive the VCO, but is set up to output only its maximum or minimum analog output control voltage. Since the construction and characteristics of the replica charge pump duplicate the main charge pump, the main charge pump's minimum and maximum analog control outputs can be cloned out to the VCO on demand. A VCO calibration procedure therefore includes switching the VCO to each of its ranges set by a bank of fixed capacitors, and using the replica charge pump to drive the VCO to its minimum and maximum frequency for each range setting. The min-max frequency data is stored in a lookup table, and operational requests to switch to a new channel frequency can be supported with a priori information about which fixed-capacitor range selection will be best. The operating point controller includes a sensor to sense the operating point and a controller that provides a switching input to a switchable bank of capacitors to change the operating point. The change can be determined according to calibration data.

86 citations

Journal ArticleDOI
TL;DR: In this paper, a 1.8 GHz fractional-N frequency synthesizer implemented in 0.6 /spl mu/m CMOS with an on-chip multiphase voltage-controlled oscillator (VCO) exhibits no spurs resulting from phase interpolation.
Abstract: A 1.8 GHz fractional-N frequency synthesizer implemented in 0.6 /spl mu/m CMOS with an on-chip multiphase voltage-controlled oscillator (VCO) exhibits no spurs resulting from phase interpolation. The proposed architecture randomly selects output phases of a multiphase VCO for fractional frequency division to eliminate spurious tones. Measured phase noise at 1.715 GHz is lower than -80 dBc/Hz within a 20 kHz loop bandwidth and -118 dBc/Hz at 1 MHz offset with no fractional spurs above -70 dBc/Hz. The synthesizer has a frequency resolution step smaller than 10 Hz. The chip consumes 52 mW at 3.3 V and occupies 3.7 mm/spl times/2.9 mm.

86 citations

Patent
Eric J. Hoffman1
30 Sep 1997
TL;DR: In this article, a random number generator using a voltage controlled oscillator (VCO) which receives a noise input and at least one differential oscillator is presented. But the generator is not suitable for high-dimensional data.
Abstract: A random number generator using, for example, a voltage controlled oscillator (VCO) which receives a noise input and at least one differential oscillator. The differential oscillator(s) provided oscillator signals to a differential sense amplifier which is sampled under control of the VCO.

85 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023168
2022344
2021269
2020388
2019469
2018530