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Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.


Papers
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Patent
22 Jun 1993
TL;DR: In this paper, a phase detector, a filter, three VCO's (VCO1, VCO2, and VCO3), a multiplexer, and a frequency divider are presented.
Abstract: The invention discloses a PLL formed by a phase detector, a filter, three VCO's (VCO1, VCO2, and VCO3), a multiplexer, and a frequency divider. The VCO1, VCO2, and VCO3 have different mean frequencies, each oscillating at a frequency controlled according to the voltage value of a phase control signal from the filter. The multiplexer selects one of the VCO's which operate in parallel. If a pulse of a digital phase difference signal UP indicating that an internal signal is delayed in phase with respect to a reference signal is output twice in succession, or if a pulse of a digital phase difference signal DOWN indicating that an internal signal is advanced in phase with respect to a reference signal is output twice in succession, a counter makes the multiplexer change its current VCO selection via a shift register. Accordingly, high-speed PLL pulling is achievable even if a PLL frequency variable-range is expanded.

75 citations

Journal ArticleDOI
TL;DR: It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique, and a dual-band quadrature voltage- controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13- m CMOS process for software-defined -radio (SDR) applications.
Abstract: This work presents complete analysis of both one- port and two-port dual-band oscillators using transformer-based fourth-order LC tanks, from which critical parameters including oscillation frequency, start-up condition, tank Q, phase noise-are thoroughly derived and compared. It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique. On the other hand, compared to one-port oscillators, two-port oscillators need to consume more power to obtain the same output swing, but their phase noise can be improved more linearly with increasing bias current, and thus they can achieve lower phase noise with a sufficiently large bias current. Based on the results, a dual-band quadrature voltage- controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13- m CMOS process for software-defined -radio (SDR) applications, in which the two-port topology is used in the low band for low phase noise and the one-port topology is employed in the high band for low power consumption. The prototype achieves a dual-band operation with in-phase and quadrature-phase (IQ) output signals from 2.7 GHz to 4.3 GHz and from 8.4 GHz to 12.4 GHz. At 3.6 GHz and 10.4 GHz, phase noise at 3 MHz offset of dBc/Hz and dBc/Hz and sideband-rejection ratios (SBR) of 37 dB and 41 dB are measured, respectively.

75 citations

Patent
28 Oct 1993
TL;DR: In this article, a phase lock loop (16) operates independent of temperature and process variation by digitally loading a VCO (22) until reaching the desired operating frequency, where the VCO reaches a high output frequency even under worst case processing by controlling multiple current mirrors (162-166, 174-180, 182-188) to increase inverter switching current without slowing the response of the VOC to changes in loop node voltage.
Abstract: A phase lock loop (16) operates independent of temperature and process variation by digitally loading a VCO (22) until reaching the desired operating frequency. The VCO reaches a high output frequency even under worst case processing by controlling multiple current mirrors (162-166, 174-180, 182-188) to increase inverter switching current without slowing the response of the VCO to changes in loop node voltage. An Initialize-to-VDD circuit (32) sets the loop node voltage to V DD so that the load control circuit need only increase loading to slow down the VCO to the desired operating frequency. A frequency range detector (34) monitors the output frequency of the VCO and passes control signals to a load control circuit to (36) activate digital loads (38) and slow down the VCO to the desired operating frequency.

75 citations

Patent
08 Nov 1983
TL;DR: In this article, a phase-locked loop frequency synthesizer is used for providing an output signal whose frequency jumps from one value to another, at regular intervals of time, at each time a new frequency is selected.
Abstract: A phase-locked loop frequency synthesizer apparatus for providing an output signal whose frequency jumps from one value to another, at regular intervals of time. Coarse tuning circuitry couples a prescribed signal to the apparatus' voltage-controlled oscillator (VCO), to drive the VCO immediately to the correct frequency each time a new frequency is selected, thereby substantially reducing the apparatus' settling time. In addition, adaptive coarse tuning circuitry continuously updates the values of stored coarse tuning information for each possible frequency, to correct for any drifts in the VCO's voltage/frequency characteristic. A VCO gain normalizer circuit amplifies the error signal coupled to the VCO by an amount that varies with the selected frequency, so as to correct for any non-uniformities in the apparatus' various elements, particularly the VCO, and to thereby provide a uniform loop gain.

75 citations

Proceedings ArticleDOI
Pietro Andreani1
07 Aug 2002
TL;DR: A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply.
Abstract: A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply. The quadrature phase error between the VCO outputs is at most 0.25/spl deg/.

75 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023168
2022344
2021269
2020388
2019469
2018530