Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

A Push–Pull Class-C CMOS VCO

Abstract: A CMOS oscillator employing differential transistor pairs working in Class-C in push-pull configuration is presented. The oscillator exhibits the same advantages enjoyed by complementary topologies on oscillators based on a single differential pair, while yielding a substantial power consumption reduction thanks to the Class-C operation. The phase-noise performance and the fundamental conditions required to keep the transistors working in Class-C are analyzed in detail. It is shown that, for an optimal performance, both nMOS and pMOS transistors should not be pushed into the deep triode region by the instantaneous resonator voltage, and a simple circuit solution is proposed to accommodate a large oscillation swing. A 0.18- μm CMOS prototype of the (voltage-controlled) oscillator displays an oscillation frequency from 6.09 to 7.50 GHz. The phase noise at 2-MHz offset is below -120 dBc/Hz with a power dissipation of 2.2 mW, for a state-of-the-art figure-of-merit ranging from 189 to 191 dBc/Hz.

Phase-locked loop employing programmable tapped-delay-line oscillator

Abstract: A phase-locked loop (PLL) having a wide range of oscillator output frequencies and a wide range of loop divider values is realizable in integrated form because the total capacitance of its loop filter is small. The PLL includes a first phase detector, a second phase detector, a programmable tapped-delay-line oscillator, a divide-by-M loop divider, and a programmable on-chip loop filter. The programmable filter is programmed to realize one of many loop filters. In a first step, oscillator output is fed back via the loop divider to the first phase detector. Oscillator frequency is decremented by changing tap selection inside the oscillator until the first phase detector determines that the frequency of the signal fed back via the loop divider (divide-by-M) is smaller than the frequency of an input signal. The tap control at which this frequency lock condition occurred, along with value M, is then used to determine which of the many loop filters will be used in a phase lock step. The programmable loop filter is controlled to realize the selected loop filter and the selected loop filter is switched into a control loop involving the second phase detector. The control loop controls the oscillator to achieve phase lock by varying a supply voltage supplied to the oscillator.

Low voltage and low power frequency synthesizer

Abstract: A low power and low voltage frequency synthesizer includes a memory (22) containing information to provide divisor information to the variable divider (20) of a phase locked loop and information to select predetermined values of capacitance to connect to the frequency determining resonant network of the VCO (18) to provide a coarse tuning. This tuning is then further modified by the normal operation of the phase locked loop.

Wideband modulated fractional-N frequency synthesizer

Abstract: A direct modulation multi-accumulator fractional-N frequency synthesizer 1 for generating a carrier signal 150 modulated by a modulation signal 170, 121 is disclosed. The frequency synthesizer includes a Voltage Controlled Oscillator, VCO 50, having a tuning port for controlling the frequency of the signal 110 output by the VCO, a variable divider 20 and a multi-accumulator sequence generator 21 for controlling the variable divider, a reference signal generator 50, a phase detector 30 and a low pass filter 40. These elements are arranged to form a Phase Locked Loop arrangement, the directly modulated output signal of which is taken from the output of the VCO, wherein in-band modulation is performed by varying the variable divider and out-of-band modulation is performed by directly applying the modulating signal to the VCO tuning port.

A 15/30- GHz Dual-Band Multiphase Voltage-Controlled Oscillator in 0.18- $\mu$ m CMOS

Abstract: A multiphase oscillator suitable for 15/30-GHz dual-band applications is presented. In the circuit implementation, the 15-GHz half-quadrature voltage-controlled oscillator (VCO) is realized by a rotary traveling-wave oscillator, while frequency doublers are adopted to generate the quadrature output signals at the 30-GHz frequency band. The proposed circuit is fabricated in a standard 0.18-mum CMOS process with a chip area of 1.1times1.0 mm2. Operated at a 2-V supply voltage, the VCO core consumes a dc power of 52 mW. With a frequency tuning range of 250 MHz, the 15-GHz half-quadrature VCO exhibits an output power of -8 dBm and a phase noise of -112 dBc/Hz at 1-MHz offset frequency. The measured power level and phase noise of the 30-GHz quadrature outputs are -16 dBm and -104 dBc/Hz, respectively