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Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.


Papers
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Patent
25 Apr 1996
TL;DR: In this article, a ring oscillator integrated circuit whose frequency of oscillation is independent of supply voltage, temperature and process technology is described, where the output of the final inverter stage is coupled to the input of the first inverter.
Abstract: A novel ring oscillator integrated circuit whose frequency of oscillation is independent of supply voltage, temperature and process technology is described. In addition, the ring oscillator circuit consumes low power and its frequency of oscillation is programmable. The ring oscillator comprises one or more inverter sections cascaded together in series. The output of the final inverter stage is coupled to the input of the first inverter stage. Inserted in the feedback loop is feedback control circuitry which functions to control the start/stop operation of the oscillator. Each inverter section includes a p-channel transistor coupled to a parallel combination of impedance and capacitance, which gives the inverter section asymmetric operating characteristics. This asymmetry helps to achieve a frequency of oscillation independent of supply voltage. A plurality of transistors having predetermined impedance's are coupled in series with the p-channel transistor to form the current limiting impedance. An output buffer provides large drive capability and achieves low power consumption by eliminating normally present crowbar current during switching. Pull-down control circuitry provides individual gate control of each of the transistors making up the current limiter in each inverter section. Process independence is achieved by trimming the plurality of pull-down current limiting transistor so as to attain a particular frequency of oscillation.

68 citations

Proceedings Article
01 Jan 1997
TL;DR: In this article, a low power tuning system that reduces the phase noise of integrated VCO's is described, which enables use of noisy integrated VOC's for reception of satellite digital signals.
Abstract: The building blocks for a low power tuning system that reduces the phase noise of integrated VCO's are described. The multi-modulus prescaler, the phase frequency detector and the wide band charge pump were integrated in a standard bipolar technology with 9 GHz npn-transistors and 200 MHz pnp-transistors. The maximum input frequency of the multi-modulus prescaler is 3 GHz, the maximum reference frequency of the phase frequency detector is 380 MHz and the -3 dB bandwidth of the charge pump is 41 MHz at a reference frequency of 300 MHz. The achieved performance enables use of noisy integrated VCO's for reception of satellite digital signals.

68 citations

Journal ArticleDOI
TL;DR: In this article, three fundamental mode voltage-controlled oscillators in the F-band (90-140GHz) were fabricated using the UMC 90-nm logic CMOS process and the maximum operating frequencies of these three oscillators are 110, 123, and 140GHz, respectively.
Abstract: Fundamental mode voltage-controlled oscillators in F-band (90-140GHz) were fabricated using the UMC 90-nm logic CMOS process. The maximum operating frequencies of these three oscillators are 110, 123, and 140GHz, respectively. The 140-GHz voltage controlled oscillator provides -22 to -19-dBm output power, a frequency tuning range of 1.2GHz and phase noise of -85dBc/Hz at 2-MHz offset from the carrier, while consuming 8mA from a 1.2-V supply

68 citations

Journal ArticleDOI
Yong-Il Kwon1, Sang-Gyu Park1, T.J. Park1, Koon-Shik Cho1, Hai-Young Lee2 
TL;DR: This work implemented and evaluated a fully integrated 2.4 GHz CMOS RF transceiver using various low-power techniques for low-rate wireless personal area network (IEEE 802.15.4 LR_WPAN) applications in 0.18-μm CMOS technology.
Abstract: In this work, we implemented and evaluated a fully integrated 2.4 GHz CMOS RF transceiver using various low-power techniques for low-rate wireless personal area network (IEEE 802.15.4 LR_WPAN) applications in 0.18-μm CMOS technology. In order to achieve an ultra low power consumption, a RC oscillator (OSC) operating below 200 nA, a regulator operating below 200 nA for sleep mode, a quick start block for the crystal oscillator, a passive wake-up circuit, a LNA with negative gm, a current bleeding mixer, and a stacked VCO are all implemented in this transceiver. The transmitter achieves less than 5.0% error vector magnitude (EVM) at 5 dBm output, and the receiver sensitivity is -101 dBm. The sensitivity of the wake-up block is -29.8 dBm. The current consumption is below 14.3 mA for the data receiving mode, 16.7 mA for the transmitter, and less than 600 nA for the sleep mode from a 1.8 V power supply. That is considered to be lowest for the 2.4 GHz CMOS ZigBee transceiver compared to open literature results.

68 citations

Patent
01 Aug 1997
TL;DR: In this article, an interference free local oscillator circuit is described, in which the first local signal is generated in a first phase lock loop and the second signal is sent to the second phase lock to control the second local signal.
Abstract: An interference free local oscillator circuit is disclosed A first local oscillator signal is generated in a first phase locked loop A second local oscillator signal is generated in a second phase locked loop Third and fourth phase locked loops provide inputs to the second phase locked loop to control the second local oscillator frequency The operating frequencies of the first and second local oscillator signals are selected so that spurious signals generated in the phase locked loops do not interfere with a received RF signal in a conversion circuit

68 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023168
2022344
2021269
2020388
2019469
2018530