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Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.


Papers
More filters
Patent
10 May 1984
TL;DR: In this paper, an approach for regenerating a clock pulse signal from a stream of data derived from a variable-speed digital video tape recorder (20) and lacking a strong clock pulse component, comprises a first phase-locked loop circuit (21) to which the incoming data is supplied and which includes a loop filter (34) of relatively wide bandwidth and a first voltage controlled oscillator (35).
Abstract: @ Apparatus for regenerating a clock pulse signal from a stream of data derived from a variable-speed digital video tape recorder (20) and lacking a strong clock pulse component, comprises a first phase-locked loop circuit (21) to which the incoming data is supplied and which includes a loop filter (34) of relatively wide bandwidth and a first voltage controlled oscillator (35). The first voltage controlled oscillator (35) supplies a regenerated clock pulse signal to a second phase-locked loop circuit (22) which includes a loop filter (38) of relatively narrow bandwidth and a second voltage controlled oscillator (39) which supplies a regenerated output clock pulse signal. The first and second voltage controlled oscillators (35, 39) are controlled by a preset control signal derived by a preset control signal generator arrangement (23) in dependence on the direction and speed of a magnetic tape (10) from which the video tape recorder (20) is reproducing the stream of data.

68 citations

Journal ArticleDOI
01 Dec 2001
TL;DR: This work focuses on the receiver for 900MHz GSM, which is the more challenging part of the transceiver design, and integrates many passive components, dissipates lower power and includes channel selection, image suppression and AGC functions.
Abstract: A low-power fully integrated GSM receiver is developed in 0.35-/spl mu/m CMOS. This receiver uses dual conversion with a low IF of 140 kHz. This arrangement lessens the impact of the flicker noise. The first IF of 190 MHz best tolerates blocking signals. The receiver includes all of the circuits for analog channel selection, image rejection, and more than 100-dB controllable gain. The receiver alone consumes 22 mA from a 2.5-V supply, to give a noise figure of 5 dB, and input IP3 of -16 dBm. A single frequency synthesizer generates both LO frequencies. The integrated VCO with on-chip resonator and buffers consume another 8 mA, and meets GSM phase-noise specifications.

68 citations

Journal ArticleDOI
TL;DR: In this article, a self-regulating voltage-controlled oscillator (VCO) with low supply sensitivity is presented. But the delay cell has a built-in compensation circuit that senses and corrects the delay variation caused by supply fluctuation.
Abstract: This paper presents a self-regulating voltage-controlled oscillator (VCO) with low supply sensitivity. With an adaptive delay cell, the self-regulating VCO achieves a low supply sensitivity of 0.15%-delay/1%-supply or less. This delay cell has a built-in compensation circuit that senses and corrects the delay variation caused by supply fluctuation. The proposed scheme rejects device noise as well and hence achieves a low phase noise of -101.4 dBc/Hz at 600-kHz offset when it runs at 900 MHz. The prototype phase-locked loop with the VCO fabricated in 0.35-/spl mu/m CMOS process shows a cycle-to-cycle rms jitter of 2.1 ps at 450 MHz (VCO at 900 MHz) under quiet supply condition.

68 citations

Journal ArticleDOI
TL;DR: In this article, a novel circuit topology for low-phase-noise voltage controlled oscillators (VCOs) is presented, which employs a PMOS cross-coupled pair with a capacitive feedback.
Abstract: A novel circuit topology for low-phase-noise voltage controlled oscillators (VCOs) is presented in this letter. By employing a PMOS cross-coupled pair with a capacitive feedback, superior circuit performance can be achieved especially at higher frequencies. Based on the proposed architecture, a prototype VCO implemented in a 0.18-mum CMOS process is demonstrated for K-band applications. From the measurement results, the VCO exhibits a 510-MHz frequency tuning range at 20GHz. The output power and the phase noise at 1-MHz offset are -3dBm and -111dBc/Hz, respectively. The fabricated circuit consumes a dc power of 32mW from a 1.8-V supply voltage

68 citations

Patent
21 Jul 1998
TL;DR: In this article, a low-power radio transceiver comprising a loop filter/sample and hold circuit for storing the VCO, control voltage and PLL in the synthesizer is presented.
Abstract: A low-power radio transceiver comprising a loop filter/sample and hold circuit (66) for storing the VCO (32), control voltage (40), thereby allowing the PLL in the synthesizer (2), to be opened and closed with minimum output frequency drift. Power consumption is reduced by partially powering down the synthesizer (2) during open-loop operation. Automatic frequency control is provided in the receiver.

67 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023168
2022344
2021269
2020388
2019469
2018530