Showing papers on "Voltage regulator published in 2013"

Voltage and Power Balance Control for a Cascaded H-Bridge Converter-Based Solid-State Transformer

Abstract: The solid-state transformer (SST) is an interface device between ac distribution grids and dc distribution systems. The SST consists of a cascaded multilevel ac/dc rectifier stage, a dual active bridge (DAB) converter stage with high-frequency transformers to provide a regulated 400-V dc distribution, and an optional dc/ac stage that can be connected to the 400-V dc bus to provide residential 120/240 V $_{\rm ac}$ . However, due to dc-link voltage and power unbalance in the cascaded modules, the unbalanced dc-link voltages and power increase the stress of the semiconductor devices and cause overvoltage or overcurrent issues. This paper proposes a new voltage and power balance control for the cascaded H-Bridge converter-based SST. Based on the single-phase dq model, a novel voltage and the power control strategy is proposed to balance the rectifier capacitor voltages and the real power through parallel DAB modules. Furthermore, the intrinsic power constraints of the cascaded H-Bridge voltage balance control are derived and analyzed. With the proposed control methods, the dc-link voltage and the real power through each module can be balanced. The SST switching model simulation and the prototype experiments are presented to verify the performance of the proposed voltage and power balance controller.

Dynamic Stability of a Microgrid With an Active Load

Abstract: Rectifiers and voltage regulators acting as constant power loads form an important part of a microgrid’s total load. In simplified form, they present a negative incremental resistance and beyond that, they have control loop dynamics in a similar frequency range to the inverters that may supply a microgrid. Either of these features may lead to a degradation of small-signal damping. It is known that droop control constants need to be chosen with regard to damping, even with simple impedance loads. Actively controlled rectifiers have been modeled in nonlinear state-space form, linearized around an operating point, and joined to network and inverter models. Participation analysis of the eigenvalues of the combined system identified that the low-frequency modes are associated with the voltage controller of the active rectifier and the droop controllers of the inverters. The analysis also reveals that when the active load dc voltage controller is designed with large gains, the voltage controller of the inverter becomes unstable. This dependence has been verified by observing the response of an experimental microgrid to step changes in power demand. Achieving a well-damped response with a conservative stability margin does not compromise normal active rectifier design, but notice should be taken of the inverter–rectifier interaction identified.

A Two-Stage Distributed Architecture for Voltage Control in Power Distribution Systems

Abstract: In this paper, we propose an architecture for voltage regulation in distribution networks that relies on controlling reactive power injections provided by distributed energy resources (DERs). A local controller on each bus of the network monitors the bus voltage and, whenever there is a voltage violation, it uses locally available information to estimate the amount of reactive power that needs to be injected into the bus in order to correct the violation. If the DERs connected to the bus can collectively provide the reactive power estimated by the local controller, they are instructed to do so. Otherwise, the local controller initiates a request for additional reactive power support from other controllers at neighboring buses through a distributed algorithm that relies on a local exchange of information among neighboring controllers. We show that the proposed architecture helps prevent voltage violations and shapes the voltage profile in radial distribution networks, even in the presence of considerable penetration of variable generation and loads. We present several case studies involving 8-, 13-, and 123-bus distribution systems to illustrate the operation of the architecture.

Wireless charging circuit, wireless charging system and semiconductor device

Abstract: To satisfy the NFC communication standard in wireless charging with a shared antenna, used for NFC communication. A power supply unit includes a voltage step-down circuit 331 , a charge control circuit 332 , and a communication controller power supply circuit 333 . The voltage step-down circuit includes a switching regulator 200 , and a selection circuit 206 and 208 which can select an output path PT 1 of the switching regulator and a bypass path PT 2 of the switching regulator. The voltage step-down circuit includes a selection control circuit 207 . The selection control circuit supplies voltage to the communication controller power supply circuit via the bypass path at the time of activating the communication controller. Since the output voltage of the series regulator stabilizes in a shorter time than the switching regulator, it becomes possible to keep the time from when RF power rises to when initial communication becomes possible, within standards.

Minimization of Transmission Loss in Meshed AC/DC Grids With VSC-MTDC Networks

Abstract: The paper considers the optimal power flow (OPF) of a meshed AC/DC power transmission network with voltage source converter based multi-terminal DC (VSC-MTDC) networks. The OPF problem is formulated to minimize the transmission loss of the whole AC/DC network with two different VSC control strategies considered, constant DC voltage control (master-slave control) and DC voltage droop control. In addition, Grid Code compliance of wind farms is also embedded in the OPF formulation. The presented OPF is evaluated and demonstrated in the paper by two example meshed AC/DC power systems.

Voltage stabilization in microgrids via quadratic droop control

Abstract: Motivated by the growing interest in energy technology and smart grid architectures, we consider the problem of voltage stability and reactive power balancing in low-voltage electrical networks equipped with DC/AC inverters (“microgrids”). It is generally believed that high-voltage equilibria of such networks are stable, but the locations of these equilibria are unknown, as is the critical network load where stability is lost. Inspired by the “control by interconnection” paradigm developed for port-Hamiltonian systems, we propose a novel droop-like inverter controller which is quadratic in the local voltage magnitude. Remarkably, under this controller the closed-loop network is again a well-posed electrical circuit. We find that the equilibria of the quadratic droop-controlled network are in exact correspondence with the solutions of a reduced power flow equation. For general network topologies, we study some simple yet insightful solutions of this equation, and for the frequently-encountered case of a parallel microgrid, we present a concise and closed-form condition for the existence of an exponentially stable high-voltage network equilibrium. Our condition establishes the existence of a critical inductive load for the network, which depends only on the network topology, admittances, and controller gains. We compare and contrast our design with the conventional droop controller, investigate the relationship between the two, and validate the robustness of our design through simulation.

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

Abstract: An integrated voltage regulator (IVR) is presented that uses custom fabricated thin-film magnetic power inductors. The inductors are fabricated on a silicon interposer and integrated with a multi-phase buck converter IC by 2.5D chip stacking. Several inductor design variations have been fabricated and tested. The best performance has been achieved with a set of eight coupled inductors that each occupies 0.245 mm2 and provides 12.5 nH with 270 mΩ DC. With early inductor prototypes, the IVR efficiency for a 1.8 V:1.0 V conversion ratio peaks at 71% with FEOL current density of 10.8 A/mm2 and inductor current density of 1.53 A/mm2. At maximum load current, 69% conversion efficiency and 1.8 V:1.2 V conversion ratio the FEOL current density reaches 22.6 A/mm2 and inductor current density reaches 3.21 A/mm2.

Design Optimization of PID Controller in Automatic Voltage Regulator System Using Taguchi Combined Genetic Algorithm Method

Abstract: The optimum design of the proportional-integral-derivative (PID) controller plays an important role in achieving a satisfactory response in the automatic voltage regulator (AVR) system. This paper presents a novel optimal design of the PID controller in the AVR system by using the Taguchi combined genetic algorithm (TCGA) method. A multiobjective design optimization is introduced to minimize the maximum percentage overshoot, the rise time, the settling time, and the steady-state error of the terminal voltage of the synchronous generator. The proportional gain, the integral gain, the derivative gain, and the saturation limit define the search space for the optimization problem. The approximate optimum values of the design variables are determined by the Taguchi method using analysis of means. Analysis of variance is used to select the two most influential design variables. A multiobjective GA is used to obtain the accurate optimum values of these two variables. MATLAB toolboxes are used for this paper. The effectiveness of the proposed method is then compared with that of the earlier GA method and the particle swarm optimization method. With this proposed TCGA method, the step response of the AVR system can be improved.

Control Scheme With Voltage Support Capability for Distributed Generation Inverters Under Voltage Sags

Abstract: Voltage sags are one of the main problems in transmission and distribution grids with high penetration of distributed generation. This paper proposes a voltage support control scheme for grid-connected power sources under voltage sags. The control is based on the injection of reactive current with a variable ratio between positive and negative sequences. The controller determines, also, the amount of reactive power needed to restore the dropped voltage magnitudes to new reference values confined within the continuous operation limits required in grid codes. These reference values are chosen in order to guarantee low current injection when fulfilling the voltage support objective. Selected experimental results are reported in order to validate the effectiveness of the proposed control.

A Carrier-Based PWM Strategy With the Offset Voltage Injection for Single-Phase Three-Level Neutral-Point-Clamped Converters

Abstract: Single-phase three-level neutral point clamped (NPC) converters are widely applied in high-speed railway electrical traction drive systems. A significant problem related to the single-phase three-level NPC converters is the fluctuation of the neutral-point voltage. In this paper, a capacitor voltage balancing technique is proposed that injects an offset voltage into the sinusoidal modulating signals of the conventional carrier-based pulsewidth modulation (CBPWM) method. Furthermore, when the injected offset voltage is maximized, it cannot only balance the dc-link capacitors voltages, but also reduce switching losses. Theoretical analysis has shown that both methods can control the neutral point voltage effectively, but the neutral point voltage controller in the CBPWM with maximum offset voltage injection (CBPWM-MOVI) has a faster dynamic response. It was observed that the high-order harmonics frequencies of the line current are centered around the twice switching frequency in the CBPWM with the offset voltage injection (CBPWM-OVI) but are centered around the switching frequency in the CBPWM-MOVI. And also, the CBPWM-MOVI has switching commutations number at least 25% below that of the CBPWM-OVI in one modulating signal period. The performances of the two strategies were verified by simulation and experimental tests.

Online Vce measurement method for wear-out monitoring of high power IGBT modules

Abstract: A simple Vce online monitoring circuit is presented in this paper. It allows an accurate wear out prediction of IGBT modules, in high-power applications, during normal converter operation. Bipolar measurement allows monitoring of both IGBT and antiparallel diode. The circuit uses two serial connected diodes to sense the Vce voltage with millivolt accuracy. One diode acts as a protection to block high DC voltage present on input terminals. When the device is conducting the voltage on the second diode is measured to compensate for the voltage drop on the protection diode thus eliminating voltage offset due to diodes' forward voltage temperature dependency. Using four diodes one can monitor voltages on all power devices in a converter leg.

A sub-ns response fully integrated battery-connected switched-capacitor voltage regulator delivering 0.19W/mm 2 at 73% efficiency

Abstract: Lithium-ion batteries are the dominant power source in mobile devices. However, while the supply voltage required for processors and SoCs has scaled down to ~1V, the voltage range of this popular battery remains ~2.9V-4.2V (nominally ~3.6V). To bridge this voltage difference, off-chip power management ICs are typically required. Despite their high efficiency, supporting many independent, high-current supplies to e.g. a multi-core SoC is extremely challenging due to cost, area, and supply impedance concerns associated with board and package level parasitics. There is hence strong motivation for efficient, fully integrated voltage regulators (IVRs) that interface directly with the battery while supporting multiple separate on-chip supply.

A 0.9-/spl mu/A Quiescent Current Output-Capacitorless LDO Regulator With Adaptive Power Transistors in 65-nm CMOS

Abstract: An ultra-low quiescent current output-capacitorless low-dropout (OCL-LDO) regulator with adaptive power transistors technique is presented in this paper. The proposed technique permits the regulator to transform itself between 2-stage and 3-stage cascaded topologies with respective power transistor, depending on the load current condition. As such, it enables the OCL-LDO regulator to achieve ultra-low power consumption, high stability and good transient response without the need of off-chip capacitor at the output. The proposed LDO regulator has been implemented and fabricated in a UMC 65-nm CMOS process. It occupies an active area of 0.017 mm2 . The measured results have shown that the proposed circuit consumes a quiescent current of 0.9 μA at no load, regulating the output at 1 V from a voltage supply of 1.2 V. It achieves full range stability from 0 to 100 mA load current at a maximum 100 pF parasitic capacitance load. The measured transient output voltage is 68.8 mV when load current is stepped from 0 to 100 mA in 300 ns with CL = 100 pF. The recovery time is about 6 μs. Compared to previously reported counterparts, the proposed OCL-LDO regulator shows a significant improvement in term of OCL-LDO transient figure-of-merit (FOM) as well as balanced performance parameters in terms of PSR, line regulation and load regulation.

A Method for Supply Voltage Boosting in an Open-Ended Induction Machine Using a Dual Inverter System With a Floating Capacitor Bridge

Abstract: An operational approach to an induction machine is presented that uses an open winding connected to a dual inverter system. A floating capacitor inverter bridge boosts the fundamental voltage available to the machine and arbitrarily sets the operating power factor of the main inverter bridge connected to the dc battery power source. During operation, the motor current charges the floating bridge dc capacitor voltage to a naturally stable dc voltage level and the ac voltage delivered to the machine is the resultant sum of the two inverter bridge voltages. Machine voltage boosting is then achieved by adjusting the fundamental phase angle difference between the two inverters to control the charge stored in the floating bridge capacitors. With the floating bridge providing reactive voltage support and therefore boosting the available supply voltage to the induction machine, there are two main outcomes: minimization of the supply current required for operation beyond the base speed of the electric machine, and supply voltage regulation of the drive system. Experimental results are used to verify the operation of the floating bridge arrangement by examining the load power factor angle and the phase difference between the two bridges. Results are presented for a passive RL load to illustrate the supply current reduction at high fundamental frequency operation, and a modified 2-hp, 1800-r/min induction to illustrate the dc voltage supply droop compensation.

Fractional adaptive control for an automatic voltage regulator.

Abstract: This paper presents the application of ad irect Fractional Order Model Reference Adaptive Controller (FOMRAC) to an Automatic Voltage Regulator (AVR). A direct FOMRAC is a direct Model Reference Adaptive Control (MRAC), whose controller parameters are adjusted using fractional order differential equations. Four realizations of the FOMRAC were designed in this work, each one considering different orders for the plant model. The design procedure consisted of determining the optimal values of the fractional order and the adaptive gains for each adaptive law, using Genetic algorithm optimization. Comparisons were made among the four FOMRAC designs, a fractional order PID (FOPID), a classical PID, and four Integer Order Model Reference Adaptive Controllers (IOMRAC), showing that the FOMRAC can improve the controlled system behavior and its robustness with respect to model uncertainties. Finally, some performance indices are presented here for the controlled schemes, in order to show the advantages and disadvantages of the FOMRAC.

Advanced Symmetrical Voltage Quadrupler Rectifiers for High Step-Up and High Output-Voltage Converters

Abstract: An advanced symmetrical voltage quadrupler rectifier (SVQR) is derived in this paper to serve as the secondary rectification topology, which helps to extend the converter voltage gain and reduce the output diode voltage stresses. The output voltage is four times of the conventional full-bridge voltage rectifier with the same transformer ratio, which benefits to reduce the turns ratio of the transformer and decrease the parasitic parameters. Also, low voltage-rated diodes with high switching performance can be applied to improve the efficiency. Meanwhile, all the diodes in SVQR have the same voltage and current stresses, which simplifies the thermal design. Furthermore, two output electrolytic capacitors are connected in series to share the high output voltage, and the voltage balance can be realized naturally without any additional voltage-sharing scheme. A clear picture is made in this paper to give a general framework and universal applications for the derived SVQRs for high step-up and high output voltage conversion systems. A dual boost converter is used as an example to demonstrate the clear advantages of the derived SVQRs.

Comparison of Small Signal Characteristics in Current Mode Control Schemes for Point-of-Load Buck Converter Applications

Abstract: Different current mode controls have been widely adopted in commercial pulsewidth modulation controllers for point-of-load (POL) converter applications. To understand the unique properties of various current mode control schemes, and to study the differences between them, this paper investigates and compares four current mode control schemes (peak-current control, valley-current control, constant on-time control, and constant off-time control) for POL power converters and voltage regulator applications. Performance attributes under investigation include high-bandwidth voltage loop design, adaptability to a converter with a wide input voltage range, adaptive voltage positioning design, and audio susceptibility. The pros and cons of these schemes are identified and explained by the unified small signal equivalent circuit model. In terms of dynamic performance, this study provides a current mode control scheme selection criteria and feedback design guidelines. The theoretical analyses are verified by both simulation and experimental results.

A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement

Abstract: A low quiescent current asynchronous digital- LDO (D-LDO) regulator integrated with a phase-locked loop (PLL)-modulated switching regulator (SWR) that achieves the near-optimum power management supply for core processor in system-on-chip (SoC). The parallel connection of the asynchronous D-LDO regulator and the ripple-based control SWR can accomplish fast-DVS (F-DVS) operation as well as high power conversion efficiency. The asynchronous D-LDO regulator controlled by bidirectional asynchronous wave pipeline realizes the F-DVS operation, which guarantees high million instructions per second (MIPS) performance of the core processor under distinct tasks. The use of a ripple-based control SWR operating with a leading phase amplifier ensures fast response and stable operation without the need for large equivalent-series-resistance, thus reducing the output voltage ripple for the enhancement of supply quality. The fabricated chip occupies 1.04 mm2 in 40 nm CMOS technology. Experimental results show that a 94% peak efficiency with a voltage tracking speed of 7.5 V/μs as well as the improved MIPS performance by 5.6 times was achieved.

A Capacitorless LDO Regulator With Fast Feedback Technique and Low-Quiescent Current Error Amplifier

Abstract: This brief presents an ultralow quiescent class-AB error amplifier (ERR AMP) of low dropout (LDO) and a slew-rate (SR) enhancement circuit to minimize compensation capacitance and speed up transient response designed in the 0.11-μm 1-poly 6-metal CMOS process. In order to increase the current capability with a low standby quiescent current under large-signal operation, the proposed scheme has a class-AB-operation operational transconductance amplifier (OTA) that acts as an ERR AMP. As a result, the new OTA achieved a higher dc gain and faster settling time than conventional OTAs, demonstrating a dc gain improvement of 15.8 dB and a settling time six times faster than that of a conventional OTA. The proposed additional SR enhancement circuit improved the response based on voltage-spike detection when the voltage dramatically changed at the output node.

Modeling and Analysis of Switching-Ripple Voltage on the DC Link Between a Diode Rectifier and a Modular Multilevel Cascade Inverter (MMCI)

Abstract: This paper focuses on the common dc-link voltage between a three-phase diode rectifier and a modular multilevel cascade inverter based on double-star chopper cells (MMCI-DSCC) for a medium-voltage motor drive. This motor drive can be operated even when no capacitor exists on the dc link. However, a nonnegligible, but predictable, amount of switching-ripple voltage occurs on the dc link. This paper achieves modeling and analysis of the switching-ripple voltage, thus making it possible to design a small-sized dc passive filter consisting of series connection of a film capacitor and a damping resistor. A 400-V, 15-kW down scaled system is used to confirm the effectiveness of the analysis and the dc filter. Experimental results show that the switching-ripple voltage can be attenuated satisfactorily by the dc filter, and that the power loss dissipated in the damping resistor is negligible, compared to the rated power of 15 kW.

Isolated Three-Phase High Power Factor Rectifier Based on the SEPIC Converter Operating in Discontinuous Conduction Mode

Abstract: This paper presents the analysis and design of a three-phase high power factor rectifier, based on the dc-dc single-ended primary-inductance converter (SEPIC) operating in discontinuous conduction mode, with output voltage regulation and high frequency isolation. The input high power factor is naturally attained through the operational mode without the use of current sensors and a current control loop. To validate the theoretical analysis, a design example and experimental results for a 4-kW, 380-V line-to-line input voltage, 400-V output voltage, 0.998 power factor, 40-kHz switching frequency, and 4% input current total harmonic distortion laboratory prototype are presented, considering two distinct modulators. In addition, experimental results for the output voltage closed-loop control are presented.

Crossover Switches Cell (CSC): A new multilevel inverter topology with maximum voltage levels and minimum DC sources

Abstract: Renewable energy resources are widely used because of providing green and economic energy for the consumers. Multilevel inverters generates low harmonic waveforms at the output, therefore they are most suitable for energy conversion to deliver efficient power to the loads from renewable energy sources like photovoltaic systems. In this paper a new dc source less topology has been introduced for multilevel inverters. It uses crossover switches to generate the maximum output voltage levels. The Crossover Switches Cell (CSC) multilevel inverter can generate all possible voltage level among the DC supply and regulated DC voltage capacitor. A voltage controller has been proposed to keep the DC capacitor voltage regulated in case of load changes. The simulation results prove the capability of CSC in producing maximum voltage levels as well as the controller ability in balancing the capacitor voltage even if the DC supply voltage changes.

5.2-GHz RF Power Harvester in 0.18- $\mu$ m CMOS for Implantable Intraocular Pressure Monitoring

Abstract: A first fully integrated 5.2-GHz CMOS-based RF power harvester with an on-chip antenna is presented in this paper. The design is optimized for sensors implanted inside the eye to wirelessly monitor the intraocular pressure of glaucoma patients. It includes a five-stage RF rectifier with an on-chip antenna, a dc voltage limiter, two voltage sensors, a low dropout voltage regulator, and MOSCAP based on-chip storage. The chip has been designed and fabricated in a standard 0.18- $\mu$ m CMOS technology. To emulate the eye environment in measurements, a custom test setup is developed that comprises Plexiglass cavities filled with saline solution. Measurements in this setup show that the proposed chip can be charged to 1 V wirelessly from a 5-W transmitter 3 cm away from the harvester chip. The energy that is stored on the 5-nF on-chip MOSCAP when charged to 1 V is 2.5 nJ, which is sufficient to drive an arbitrary 100- $\mu$ W load for 9 $\ \mu$ s at regulated 0.8 V. Simulated efficiency of the rectifier is 42% at ${-}$ 7 dBm of input power.

Probabilistic voltage stability assessment considering renewable sources with the help of the PV and QV curves

Abstract: The use of renewable energy sources has increased year-on-year. Thus, there is an increasing rate of small generating units connected directly to distribution networks and micro-grids close to consumers. At the same time, these micro-sources must provide stability and reliability of electrical energy to the power network to which they are connected. In the technical literature, several studies have been done to ensure power systems with traditional generating sources to operate in a stable and reliable way, but there is an issue regarding generation uncertainty when a distribution system has many micro-sources. This is because of the uncertainty of primary sources, for example, wind and radiation intensity, and could result in intermittent generation. In this study, stability and reliability of voltage in a power system with distributed generation is analysed using simulation techniques. In the proposed method in this study voltage security analysis is jointly considered with probability laws. Moreover reliability theory is also considered in the proposed voltage collapse analysis methodology. The responsibility of generator in the voltage collapse process, the probabilistic risk of voltage collapse of each operating point and the probability of enlarging the system load as a function of different operating points are the outcome of the methodology, and it is validated by using the IEEE34 test feeder.

Design of Optimal Fractional-Order PID Controllers Using Particle Swarm Optimization Algorithm for Automatic Voltage Regulator (AVR) System

Abstract: In practical applications, the pure derivative action is never used, due to the “derivative kick” produced in the control signal for a step input, and to the undesirable noise amplification. It is usually replaced by a first-order low-pass filter. In this paper, we use a $$\mu $$ -order fractional low-pass filter and define a practical fractional-order controller. The proposed approach with new defined fitness function has very easy implementation and the most control performance. We present a method for optimum tuning of practical fractional PID controllers for automatic voltage regulator system using particle swarm optimization (PSO) algorithm. PSO is a robust stochastic optimization technique based on the movement and intelligence of swarm, applies the concept of social interaction to problem solving. From the comparison this technique with the other methods, its influence and efficiency are illustrated. Simulations and comparisons with other FOPID/PID controllers illustrate that the proposed PSO-FOPID controller can provide good control performance with respect to reference input and also improve the system robustness with respect to model uncertainties.

Write assist circuit, memory device and method

Abstract: A write assist circuit includes a first switch, a second switch and a bias voltage circuit. The first switch connects a cell supply voltage node of a memory cell to a power supply voltage node in response to a write control signal having a first state, and disconnects the cell supply voltage node from the power supply voltage node in response to the write control signal having a second state. The bias voltage circuit generates, at an output thereof, an adjustable bias voltage lower than the power supply voltage. The second switch connects the cell supply voltage node to the output of the bias voltage circuit in response to the write control signal having the second state, and disconnects the cell supply voltage node from the output of the bias voltage circuit in response to the write control signal having the first state.

Virtual impedance current limiting for inverters in microgrids with synchronous generators

Abstract: This paper focuses on current limiting for voltage controlled inverters during overloads caused by poor transient load sharing between inverters and synchronous generators in islanded microgrids. The use of simple current reference saturation limiters can cause instability when the voltage regulator loses control after the current reference saturates. The use of virtual impedance for current limiting is shown to provide stable current limiting when operating in parallel with synchronous generators. Small signal analysis is used to set the virtual impedance magnitude and X/R ratio, and validation is provided by simulation and experimental results.

A High-Efficiency Wide-Input-Voltage Range Switched Capacitor Point-of-Load DC–DC Converter

Abstract: The traditional inductor-based buck converter has been the default design for switched-mode voltage regulators for decades. Switched capacitor (SC) dc-dc converters, on the other hand, have traditionally been used in low-power ( 80% over a load range of 5 mA to 1 A) than surveyed competitive buck converters, while requiring less board area and less costly passive components. The topology and controller enable a wide input range of 7.5-13.5 V. Controls based on feedback and feedforward provide tight regulation under worst case line and load step conditions. This study shows that the SC converter can outperform the buck converter, and thus, the scope of SC converter application can and should be expanded.

Start-Up Control and Voltage Regulation in a Boost Converter Under Sliding-Mode Operation

Abstract: This paper presents the analysis and design of a sliding-mode control of a boost converter operating in continuous conduction mode that minimizes the inrush current and provides output voltage regulation in front of input voltage perturbations and load changes. The analytical expression of the inrush current is obtained, and the conditions to minimize the current peak are derived. The resulting controller is implemented analogically and employs two switching surfaces. Namely, one surface is combined with the conventional auxiliary diode branch for the start-up, while another one is used for the voltage regulation in steady state. Experimental results are in perfect agreement with the theoretical predictions.