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Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.


Papers
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Journal ArticleDOI
TL;DR: The proposed algorithm adapts energy-optimized series voltage compensation, which results in a reduction of energy storage requirement and model-based computer simulation studies and real-time experimental results validate the effectiveness of the proposed control algorithm.
Abstract: This paper deals with the protection of critical loads from voltage-related power quality issues using a dynamic voltage restorer (DVR). A generalized control algorithm based on instantaneous space phasor and dual $P$ - $Q$ theory has been proposed to generate the instantaneous reference voltages to compensate the load voltages with direct power flow control. The proposed algorithm adapts energy-optimized series voltage compensation, which results in a reduction of energy storage requirement. The proposed DVR control scheme can support the load from voltage-related power quality issues irrespective of the load current profile. Each leg of the three-phase three-leg split capacitor inverter is used to inject series compensation voltage in respective phases of the system. Model-based computer simulation studies and real-time experimental results validate the effectiveness of the proposed control algorithm.

81 citations

Journal ArticleDOI
TL;DR: In this paper, a 500-MHz supply-noise-insensitive CMOS phase-locked loop (PLL) with a voltage regulator using a capacitive dc-dc converter (VRCC) achieves a jitter level of 30-ps RMS for quiet supply, and 42-psRMS for 600-mV supply noise, with a locking range of 110 to 850 MHz.
Abstract: A 500-MHz supply-noise-insensitive CMOS phase-locked loop (PLL) with a voltage regulator using a capacitive dc-dc converter (VRCC) achieves a jitter level of 30-ps RMS for quiet supply, and 42-ps RMS for 600-mV supply noise, with a locking range of 110 to 850 MHz. The worst-case power supply noise rejection (PSNR) using the VRCC shows -45 dB in the mid-frequency band. The circuit is fabricated in a 0.35-/spl mu/m 3.3-V standard digital CMOS process and occupies 2.3 mm/sup 2/. The power consumption at 3.3 V including buffer is 42 mW at 500 MHz.

81 citations

Journal ArticleDOI
TL;DR: Predictive voltage control algorithm-based TDVR tracks the reference voltage effectively and maintains load voltages sinusoidal during various voltage disturbances as well as load conditions.
Abstract: This paper presents a predictive voltage control scheme for the effective control of a transformerless dynamic voltage restorer (TDVR). This control scheme utilizes the discrete model of a voltage source inverter and an interfacing filter for the generation of the switching strategy of inverter switches. Predictive voltage control algorithm-based TDVR tracks the reference voltage effectively and maintains load voltages sinusoidal during various voltage disturbances as well as load conditions. Moreover, this scheme does not require any linear controller or modulation technique. Simulation and experimental results are presented to verify the performance of the proposed scheme.

81 citations

Patent
19 Sep 2005
TL;DR: In this article, an inverter for converting a DC input voltage from the energy source to a square wave AC output voltage, and a converter for converting the AC output voltages from the inverter to a sine wave AC voltage.
Abstract: Apparatus for conditioning power generated by an energy source includes an inverter for converting a DC input voltage from the energy source to a square wave AC output voltage, and a converter for converting the AC output voltage from the inverter to a sine wave AC output voltage.

81 citations

Patent
13 Nov 1996
TL;DR: In this article, a removable controller card comprised of a plurality of Flash EEPROM devices and a controller device is described, which is further comprised of voltage detection circuitry including a variable voltage detector and a voltage regulator circuit.
Abstract: A removable controller card comprised of a plurality of Flash EEPROM devices (24) and a controller device (20) is described. The controller device (20) is further comprised of voltage detection circuitry including a variable voltage detector (28) for determining the system voltage level provided by a power supply within a computer (25) and for appropriately enabling a voltage regulator circuit (30) for dividing the system voltage level to a level suited for operation by the Flash EEPROM devices (24) and applying this operational voltage level to the Flash EEPROM devices (24). Upon determining the system voltage level provided by the power supply to be appropriately suited for operation of the Flash EEPROM devices (24), disabling the voltage regulator circuit (30) and providing the system voltage level to the Flash EEPROM devices (24).

81 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202382
2022212
2021320
2020699
2019947
2018973