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Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.


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Journal ArticleDOI
TL;DR: Simulation and experimental studies show that CMV injection significantly reduces the capacitor voltage ripple and the CC in legs and the proposed approach also improves output voltage and current waveform quality.
Abstract: Submodule (SM) capacitor voltage ripple is one of the major concerns in modular multilevel converters (MMCs). Capacitor voltage ripple leads to the double-frequency circulating current (CC) in legs, thereby resulting in a cascading effect of increased peak value of the arm current, semiconductor device stress, and power losses in MMCs. In this study, a model predictive control (MPC) with common-mode voltage (CMV) injection is proposed to minimize capacitor voltage ripple and the magnitude of CC. A discrete-time mathematical model of the MMC with CMV is presented to predict the future behavior of the control variables. The injection of CMV guarantees arm voltage balancing without CC control and long-term stability of MMC without large capacitors. The dynamic and steady-state performances of MPC with CMV injection are verified on an MMC with three-level flying capacitor SMs. A performance comparison between the proposed approach and the conventional MPC is also presented. Simulation and experimental studies show that CMV injection significantly reduces the capacitor voltage ripple and the CC in legs. The proposed approach also improves output voltage and current waveform quality.

81 citations

Patent
Mcgowan Neil1, Xin Jin1
07 May 2001
TL;DR: In this paper, a peak power regulator is proposed to reduce peak power spikes within baseband signals while maintaining the average output power consistent with the average input power, controlling the out-of-band emissions, and maintaining the in-band signal quality within an acceptable degradation.
Abstract: A peak power regulator is disclosed that functions within a Code Division Multiple Access (CDMA) transmitter to reduce peak power spikes within baseband signals while maintaining the average output power consistent with the average input power, controlling the out-of-band emissions, and maintaining the in-band signal quality within an acceptable degradation In-phase and quadrature baseband signals are input to a delay block and an envelope magnitude predictor within the peak power regulator The envelope magnitude predictor outputs an estimate for the magnitude of the envelope that will be generated when the inputted baseband signals are modulated This estimate is input to a multiplier that generates a ratio by dividing the estimate by a maximum acceptable envelope magnitude The ratio is subsequently input to a mapping table that outputs a scaling factor sufficient for reducing peak power spikes The scaling factor is subsequently input to an optional mean power regulator that generates an instantaneous gain value sufficient to maintain the average output power level at the average input power level This gain value is applied to two multipliers that are also input with delayed versions of the in-phase and quadrature baseband input signals The outputs from these two multipliers, after being filtered within lowpass filters to remove out-of-band emissions caused by the scaling, are output from the peak power regulator These peak power reduced outputs have any peak power spikes scale reduced while maintaining the average power constant

80 citations

Journal ArticleDOI
TL;DR: A model with four independent dynamical components of the arm currents, which also considers the effect of ac and dc systems, is proposed and facilitates the dynamical analysis of currents and simplifies the design and implementation of current controllers.
Abstract: Modular multilevel converters offer several benefits, such as high scalability and power quality, which are particularly advantageous for high-voltage dc transmission systems. However, the control of such converters is very challenging due to the number of control objectives to be achieved simultaneously. The input and output currents must be controlled at their own references, and these references must be properly generated in order to keep the average capacitor voltage constant. The circulating current can be controlled either to minimize losses or to reduce capacitor voltage ripple. Additionally, the capacitor voltage must be kept balanced among cells during the converter operation. In this paper, a model with four independent dynamical components of the arm currents, which also considers the effect of ac and dc systems, is proposed. The proposed model facilitates the dynamical analysis of currents and simplifies the design and implementation of current controllers. Analysis of the proposed current model and experimental results, which confirm the performance of the designed controllers, is shown.

80 citations

Patent
03 Dec 2008
TL;DR: In this article, a solar power array includes solar power panels, where each solar panel provides output current and voltage, separate DC-DC converters, and a DC-AC inverter that inverts the high-voltage DC on the high voltage DC bus to an AC power signal for distribution to one or more AC loads.
Abstract: A solar power array includes solar power panels, where each solar panel provides output current and voltage, separate DC-DC converters, where each solar panel is connected to a unique DC-DC converter, where each DC-DC converter is designed to maximize the power from each solar panel, and where each DC-DC converter produces a high voltage output, a high voltage DC bus coupled to the DC-DC converters that receives the high voltage output, and a DC-AC inverter that inverts the high voltage DC on the high voltage DC bus to an AC power signal for distribution to one or more AC loads.

80 citations

Patent
10 Aug 1992
TL;DR: In this article, a voltage regulating control loop for a boost converter having a gain stabilizing stage is provided, which makes the open-loop AC gain independent of the DC output of the boost converter and the root mean square value of the 50/60 Hz line input voltage.
Abstract: A voltage regulating control loop for a boost converter having a gain stabilizing stage is provided. The gain stabilizing stage makes the open-loop AC gain independent of the DC output of the boost converter and of the root mean square value of the 50/60 Hz line input voltage. The gain stabilizing stage generates an error voltage that is proportional to the square root of a voltage that is a function of the DC output current divided by the root mean square value of the 50/60 Hz line voltage. The error voltage is compared to the integrated value of a signal inversely proportional to the error voltage to the on time of the power stage FET.

80 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202382
2022212
2021320
2020699
2019947
2018973