Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.

VRM transient study and output filter design for future processors

Abstract: In this paper, the transient response of the (voltage regulator module) VRM output voltage when the processor has a fast load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be approximately considered as a decoupled second order system. The transient response is affected by the magnitude of the load change rather than the slew rate of it. Limitations of the present VRM topology for future specifications and output filter design are discussed.

Voltage regulator for semiconductor non-volatile electrically programmable memory devices

Abstract: A voltage regulator for electrically programmable non-volatile memory cells includes a gain stage which is supplied a voltage from a voltage booster connected to a supply voltage reference, having an input terminal connected to an output of a voltage divider and an output terminal connected to a pull-up transistor of a pull-up and pull-down differential pair to output the regulated voltage for programming at least one column or bit line of the memory cells. The voltage regulator also includes a second gain stage having an input terminal connected to a second output of the voltage divider. The second stage has an output connected to turn on the pull-down transistor in the complementary pair upon the regulated voltage exceeding a predetermined value.

Design of Optimal Fractional-Order PID Controllers Using Particle Swarm Optimization Algorithm for Automatic Voltage Regulator (AVR) System

Abstract: In practical applications, the pure derivative action is never used, due to the “derivative kick” produced in the control signal for a step input, and to the undesirable noise amplification. It is usually replaced by a first-order low-pass filter. In this paper, we use a $$\mu $$ -order fractional low-pass filter and define a practical fractional-order controller. The proposed approach with new defined fitness function has very easy implementation and the most control performance. We present a method for optimum tuning of practical fractional PID controllers for automatic voltage regulator system using particle swarm optimization (PSO) algorithm. PSO is a robust stochastic optimization technique based on the movement and intelligence of swarm, applies the concept of social interaction to problem solving. From the comparison this technique with the other methods, its influence and efficiency are illustrated. Simulations and comparisons with other FOPID/PID controllers illustrate that the proposed PSO-FOPID controller can provide good control performance with respect to reference input and also improve the system robustness with respect to model uncertainties.

Write assist circuit, memory device and method

Abstract: A write assist circuit includes a first switch, a second switch and a bias voltage circuit. The first switch connects a cell supply voltage node of a memory cell to a power supply voltage node in response to a write control signal having a first state, and disconnects the cell supply voltage node from the power supply voltage node in response to the write control signal having a second state. The bias voltage circuit generates, at an output thereof, an adjustable bias voltage lower than the power supply voltage. The second switch connects the cell supply voltage node to the output of the bias voltage circuit in response to the write control signal having the second state, and disconnects the cell supply voltage node from the output of the bias voltage circuit in response to the write control signal having the first state.

Miller compensated NMOS low drop-out voltage regulator using variable gain stage

Abstract: A high power supply ripple rejection (PSRR) internally compensated low drop-out voltage regulator using an output NMOS pass device. The voltage regulator uses an inverting inter-stage variable gain amplifier to adjust its gain in response to a load current passing through the output NMOS device such that as the load current decreases, the gain increases, wherein a second pole associated with the voltage regulator is pushed above a unity gain frequency associated with the voltage regulator. The inverting inter-stage variable gain amplifier is further operational to adjust its gain in response to a load current passing through the power NMOS device such that as the load current increases, the gain decreases, wherein the unity gain bandwidth associated with the loop formed by a compensation capacitor is kept substantially constant.