Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.

Load power reduction control and supply system

Abstract: The invention is a load voltage and power control and supply system for the supply of power to a load for which, over particular periods of time, usually on a daily basis, it is desired to reduce power. The invention has particular application to street lighting systems in which, for a period of several hours during the night (when traffic is minimal and many people are asleep), the luminaires of the lighting system can operate at reduced power. The power control system is able to act as a voltage stabilizer as well as a controlled power reduction system. The power control system may operate the bank of spaced luminaires from a single control location. Moderately reduced power (say a 30% reduction in power) supplied to luminaires does not noticeably diminish the adequacy of the illumination provided. Further, the power control system reduces power in stepwise decrements each of which reduces power by a small amount insufficient to diminish noticeably the ambient illumination.

Ultra-low voltage nano-scale memories

Abstract: An Introduction to LSI Design.- Ultra-Low Voltage Nano-Scale DRAM Cells.- Ultra-Low Voltage Nano-Scale SRAM Cells.- Leakage Reduction for Logic Circuits in RAMs.- Variability Issue in the Nanometer Era.- Reference Voltage Generators.- Voltage Down-Converters.- Voltage Up-Converters and Negative Voltage Generators.- High-Voltage Tolerant Circuits.

Low-Power Supply-Regulation Techniques for Ring Oscillators in Phase-Locked Loops Using a Split-Tuned Architecture

Abstract: A supply-regulated phase-locked loop (PLL) employs a split-tuned architecture to decouple the tradeoff between supply-noise rejection performance and power consumption. By placing the regulator in the low-bandwidth coarse loop, the proposed PLL architecture allows us to maximize its bandwidth to suppress the oscillator phase noise with neither the power supply-noise rejection nor the power dissipation of the regulator being affected. A replica-based regulator introduces a low-frequency pole in its supply-noise transfer function and avoids degradation of supply-noise rejection beyond the regulator-loop's dominant pole frequency. The prototype PLL fabricated in a 0.18 mum digital CMOS process operates from 0.5 to 2.5 GHz. At 1.5 GHz, the proposed PLL achieves 1.9 ps long-term rms jitter and a worst case supply-noise sensitivity of -28 dB (0.5 rad/V), an improvement of 20 dB over conventional solutions, while consuming 2.2 mA from a 1.8 V supply.

Digital signal processor controlled uninterruptable power supply

Abstract: An uninterruptable power supply controlled by a digital signal processor. The digital signal processor periodically senses an input current, an input voltage, a battery current, a battery voltage boost circuit, first and second DC bus voltages, an output current and an output voltage. The digital signal processor controls an AC to DC conversion unit, a battery charger, a battery voltage boost circuit and a DC to AC inverter via an inner current loop and an outer voltage loop. The digital signal processor calculates the inner current loops each predetermined time interval and calculates the outer voltage loops every two predetermined time intervals. The digital signal processor preferably alternately senses a first group of signals consisting of the input voltage, the input current, the output voltage and the output current and a second group of signals consisting of the battery voltage, the battery current, the first DC bus voltage and a second DC bus voltage. The timing of the input signal sensing and the respective current loop and voltage loop calculations are timed by one or more repetitive interrupt timers.

Robust average current-mode control of multimodule parallel DC-DC PWM converter systems with improved dynamic response

Abstract: This paper presents a novel average current-mode control (ACC) strategy for the control of multimodule parallel pulsewidth modulation DC-DC converters, which represents a drastic improvement over conventional ACC. This new method consists of the addition of an auxiliary controller into the control loop, besides the current and voltage regulators. The reference-model-based auxiliary controller improves the robustness of the ACC dynamics in buck-derived distributed power systems, preserving loop gain crossover frequency and stability margins over significant changes of the number of connected modules, the load and the line voltage. Moreover, this control scheme shows much better disturbance rejection properties, i.e., closed-loop output impedance and audiosusceptibility, than conventional ACC. From a control theory point of view robust performance is achieved, preserving stability. A multimodule buck prototype has been experimentally tested with different numbers of modules on stream, line, and load conditions, including discontinuous conduction mode. Measurements of the small-signal frequency response of the converter have been carried out, showing the improvement achieved by the proposed control scheme. The empirical large-signal response of the converter under load steps is also shown in order to validate the concept.