Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.

Technique for decoupling the energy storage system voltage from the DC link voltage in AC electric drive systems

Abstract: An ac electric drive system includes a bidirectional power semiconductor interface between a battery, or an auxiliary energy storage device, and a power inverter for boosting an input do voltage and for decoupling the dc link voltage from the input dc voltage such that the dc link voltage is substantially independent of the input dc voltage and the parameters of the battery or energy storage device. The input dc voltage is controlled to maximize efficiency along predetermined torque envelopes.

Nonvolatile semiconductor memory device

Abstract: Provided is a nonvolatile semiconductor memory device which can enhance a stable control of a voltage applied to a memory cell and has excellent capability of controlling a drain voltage The nonvolatile semiconductor memory device includes: a plurality of memory cells; a write buffer receiving data to be written to the plurality of memory cells; a count circuit searching data input to the write buffer and determining bit number of data to be simultaneously programmed to the plurality of memory cells; a write circuit supplying a write voltage to the plurality of memory cells according to the data; and a voltage regulator supplying a control voltage (Vpb) to the write circuit, wherein the voltage regulator includes a controller Counting write bit number and supplying the control voltage (Vpb) according to the counted write bit number

Optimized frequency-shaping circuit topologies for LDOs

Abstract: Typical low drop-out (LDO) regulator architectures suffer from an inherent load regulation performance limitation. This limitation manifests itself through limited DC open-loop gain, and results from stringent closed-loop bandwidth requirements. The frequency response of the system is highly sensitive to the loading conditions, thereby making proper compensation a laborious endeavor. This paper discusses and addresses the limitation on regulating performance imposed by frequency compensation. Several LDO circuit topologies are subsequently developed to this end. They enhance load regulation performance by relaxing the DC open-loop gain restrictions. The circuit structures essentially alter the frequency response of the system via the error amplifier. A low drop-out regulator adopting an embodiment of the proposed technique was fabricated in the MOSIS 2-/spl mu/m process technology. The system, designed for an output capacitor of 4.7 /spl mu/F, was stable with an equivalent series resistance (ESR) ranging from 0 to 12 /spl Omega/, bypass capacitors ranging from 0 to 2.2 /spl mu/F, and a load current ranging from 0 to 50 mA.

Digital PWM control: application in voltage regulation modules

Abstract: Conventionally, controllers for DC/DC converters have relied on analog circuit techniques for implementation. While analog based systems have proven successful, several reasons make digital control attractive. Digital control allows for the implementation of more functional control schemes. Digital circuits are potentially less susceptible to noise and parameter variations. With the explosion of cheap computing power, and availability of advanced integrated circuit design and synthesis tools, a digital controller design can be ported to new integrated circuit technology generations with little additional effort. Current trends in microprocessor designs lead toward decreasing supply voltages and increasing current demands. Future microprocessors are projected to require between 30-60 Amps of static current and impose di/dt requirements on the power supply in the order of 5 A/ns. In this paper, we focus on the design of a digital controller for an interleaved DC/DC buck converter to supply power for microprocessor loads. Digital logic makes the generation of identical, but delayed, gate drive signals for the various phases of the interleaved converter simple.

Architecture and IC implementation of a digital VRM controller

Abstract: This paper develops the architecture of a digital PWM controller for application in multi-phase voltage regulation modules (VRMs) with passive current sharing. In this context, passive current sharing and VRM transient response are analyzed. A scheme for sensing a combination of the VRM output voltage and output current with a single low-resolution windowed analog-to-digital converter (ADC) is proposed. The architecture and IC implementation of a digital PWM (DPWM) generation module, using a ring-oscillator-MUX scheme, is discussed. Experimental results from a prototype VRM and a partial controller IC implementation are presented.