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Voltage regulator

About: Voltage regulator is a research topic. Over the lifetime, 33536 publications have been published within this topic receiving 350859 citations.


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Journal ArticleDOI
TL;DR: Comparisons were made among the four FOMRAC designs, a fractional order PID, a classical PID, and four Integer Order Model Reference Adaptive Controllers, showing that the FomRAC can improve the controlled system behavior and its robustness with respect to model uncertainties.
Abstract: This paper presents the application of ad irect Fractional Order Model Reference Adaptive Controller (FOMRAC) to an Automatic Voltage Regulator (AVR). A direct FOMRAC is a direct Model Reference Adaptive Control (MRAC), whose controller parameters are adjusted using fractional order differential equations. Four realizations of the FOMRAC were designed in this work, each one considering different orders for the plant model. The design procedure consisted of determining the optimal values of the fractional order and the adaptive gains for each adaptive law, using Genetic algorithm optimization. Comparisons were made among the four FOMRAC designs, a fractional order PID (FOPID), a classical PID, and four Integer Order Model Reference Adaptive Controllers (IOMRAC), showing that the FOMRAC can improve the controlled system behavior and its robustness with respect to model uncertainties. Finally, some performance indices are presented here for the controlled schemes, in order to show the advantages and disadvantages of the FOMRAC.

103 citations

Proceedings ArticleDOI
26 Jul 2015
TL;DR: In this article, the minimum size and the best place of battery storage is achieved by optimizing the amount of both active and reactive power exchanged by battery storage and its grid-tie inverter based on the network topology and R/X ratios in the distribution system.
Abstract: This paper proposes a new strategy to achieve voltage regulation in distributed power systems in the presence of solar energy sources and battery storage systems The goal is to find the minimum size of battery storage and its corresponding location in the network based on the size and place of the integrated solar generation The proposed method formulates the problem by employing the network impedance matrix to obtain an analytical solution instead of using a recursive algorithm such as power flow The required modifications for modeling the slack and PV buses (generator buses) are utilized to increase the accuracy of the approach The use of reactive power control to regulate the voltage regulation is not always an optimal solution as in distribution systems R/X is large In this paper the minimum size and the best place of battery storage is achieved by optimizing the amount of both active and reactive power exchanged by battery storage and its grid-tie inverter (GTI) based on the network topology and R/X ratios in the distribution system Simulation results for the IEEE 14-bus system verify the effectiveness of the proposed approach

103 citations

Patent
09 Jun 2008
TL;DR: In this paper, the authors present a power regulator system consisting of at least one current regulator configured to maintain a substantially constant current flow through each series connected light emitting diode (LED) string.
Abstract: One embodiment of the invention includes a power regulator system. The system comprises at least one current regulator configured to maintain a substantially constant current flow through each of at least one series connected light emitting diode (LED) string. The system also comprises a power converter configured to generate an output voltage to provide power to the at least one current regulator and the at least one series connected LED string. The system further comprises a voltage regulator configured to determine a voltage that provides power to the at least one current regulator and to adjust the output voltage based on the determined voltage to mitigate power loss due to excessive voltage provided to power the at least one current regulator.

103 citations

Journal ArticleDOI
TL;DR: In this article, a methodology to improve the power system economical dispatch from a voltage stability margin perspective is presented, which is based on active/reactive power re-dispatch for normal operation, and also minimum load shedding strategies in case of critical contingencies.
Abstract: This paper presents a methodology to improve the power system economical dispatch from a voltage stability margin perspective. The time horizon under discussion is the short-term operation planning. The proposed method is based on active/reactive power re-dispatch for normal operation, and also minimum load shedding strategies in case of critical contingencies. The actions are taken in the direction provided by modal participation factors computed for generator and load buses. The generators with negative impact on system margin, which are indicated by the modal index, are penalized with high costs on the objective function of the optimal power flow program used to run the re-dispatch process. Results of this work show a decrease on system losses and significant increase on voltage stability margin as well as on system reactive reserves. In addition, this work presents a study considering critical contingencies, for which is proposed an optimal load shedding strategy also based on modal participation factors to identify the most adequate buses for load shedding purposes. Finally, the proposed methodology is applied considering a typical hour-to-hour daily load curve, and the method presented very good performance since it considerably increases voltage stability margin for the insecure intervals.

103 citations

Journal ArticleDOI
TL;DR: The proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, while taking into account process-voltage-temperature variations.
Abstract: In this brief, a new low-power level shifter (LS) is presented for robust logic voltage shifting from near/sub-threshold to above-threshold domain. The new circuit combines the multi-threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total energy consumption. When implemented in a 90-nm technology process, the proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, also taking into account process-voltage-temperature variations.Post-layout simulation results demonstrate that the new LS reaches a propagation delay less than 22 ns, a static power dissipation of only 6.4 nW, and a total energy per transition of only 74 fJ for a 0.2-V 1-MHz input pulse.

102 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202382
2022212
2021320
2020699
2019947
2018973