Showing papers on "Wafer published in 2016"

Silicon Nanowires for Solar Thermal Energy Harvesting: an Experimental Evaluation on the Trade-off Effects of the Spectral Optical Properties

Abstract: Silicon nanowire possesses great potential as the material for renewable energy harvesting and conversion. The significantly reduced spectral reflectivity of silicon nanowire to visible light makes it even more attractive in solar energy applications. However, the benefit of its use for solar thermal energy harvesting remains to be investigated and has so far not been clearly reported. The purpose of this study is to provide practical information and insight into the performance of silicon nanowires in solar thermal energy conversion systems. Spectral hemispherical reflectivity and transmissivity of the black silicon nanowire array on silicon wafer substrate were measured. It was observed that the reflectivity is lower in the visible range but higher in the infrared range compared to the plain silicon wafer. A drying experiment and a theoretical calculation were carried out to directly evaluate the effects of the trade-off between scattering properties at different wavelengths. It is clearly seen that silicon nanowires can improve the solar thermal energy harnessing. The results showed that a 17.8 % increase in the harvest and utilization of solar thermal energy could be achieved using a silicon nanowire array on silicon substrate as compared to that obtained with a plain silicon wafer.

Graphene-β-Ga2O3 Heterojunction for Highly Sensitive Deep UV Photodetector Application

Abstract: A deep UV light photodetector is assembled by coating multilayer graphene on beta-gallium oxide (β-Ga2 O3 ) wafer. Optoelectronic analysis reveals that the heterojunction device is virtually blind to light illumination with wavelength longer than 280 nm, but is highly sensitive to 254 nm light with very good stability and reproducibility.

20‐mm‐Large Single‐Crystalline Formamidinium‐Perovskite Wafer for Mass Production of Integrated Photodetectors

Abstract: CH3NH3PbX3 (MAPbX3)-based perovskite has attracted tremendous research efforts in the last few years. With the discovery that the HC(NH2)2PbI3 (FAPbI3) perovskite offers even higher solar cell efficiency, better thermal stability, and broader optical absorption, it is expected that it will provide more excitement in optoelectronic applications including laser, LED, photodetector, etc. The development in preparing large Single-Crystalline Formamidinium-Perovskite FAPbI3 using the inverse-temperature reactive crystallization process, and associated wafer-slicing process is presented. The availability of the large Single-Crystalline Formamidinium-Perovskite Wafer makes it possible to fabricate integrated circuits. An array of 153 photodetectors on a piece of thin wafer, demonstrating feasibility of mass production of integrated circuits on the perovskite wafer is designed and prepared. It is found that the wafer-based photodetector shows much superior performance, with 90 times higher photoresponse and broader optical absorption than its thin-film perovskite counterpart.

Wafer-sized multifunctional polyimine-based two-dimensional conjugated polymers with high mechanical stiffness

Abstract: One of the key challenges in two-dimensional (2D) materials is to go beyond graphene, a prototype 2D polymer (2DP), and to synthesize its organic analogues with structural control at the atomic- or molecular-level. Here we show the successful preparation of porphyrin-containing monolayer and multilayer 2DPs through Schiff-base polycondensation reaction at an air-water and liquid-liquid interface, respectively. Both the monolayer and multilayer 2DPs have crystalline structures as indicated by selected area electron diffraction. The monolayer 2DP has a thickness of∼0.7 nm with a lateral size of 4-inch wafer, and it has a Young's modulus of 267±30 GPa. Notably, the monolayer 2DP functions as an active semiconducting layer in a thin film transistor, while the multilayer 2DP from cobalt-porphyrin monomer efficiently catalyses hydrogen generation from water. This work presents an advance in the synthesis of novel 2D materials for electronics and energy-related applications.

Four-Junction Wafer-Bonded Concentrator Solar Cells

Abstract: The highest solar cell conversion efficiencies are achieved with four-junction devices under concentrated sunlight illumination. Different cell architectures are under development, all targeting an ideal bandgap combination close to 1.9, 1.4, 1.0, and 0.7 eV. Wafer bonding is used in this work to combine materials with a significant lattice mismatch. Three cell architectures are presented using the same two top junctions of GaInP/GaAs but different infrared absorbers based on Germanium, GaSb, or GaInAs on InP. The modeled efficiency potential at 500 suns is in the range of 49–54% for all three devices, but the highest efficiency is expected for the InP-based cell. An efficiency of 46% at 508 suns was already measured by AIST in Japan for a GaInP/GaAs//GaInAsP/GaInAs solar cell and represents the highest independently confirmed efficiency today. Solar cells on Ge and GaSb are in the development phase at Fraunhofer ISE, and the first demonstration of functional devices is presented in this paper.

Highly Transparent Wafer-Scale Synthesis of Crystalline WS2 Nanoparticle Thin Film for Photodetector and Humidity-Sensing Applications.

Abstract: In the present investigation, we report a one-step synthesis method of wafer-scale highly crystalline tungsten disulfide (WS2) nanoparticle thin film by using a modified hot wire chemical vapor deposition (HW-CVD) technique. The average size of WS2 nanoparticle is found to be 25–40 nm over an entire 4 in. wafer of quartz substrate. The low-angle XRD data of WS2 nanoparticle shows the highly crystalline nature of sample along with orientation (002) direction. Furthermore, Raman spectroscopy shows two prominent phonon vibration modes of E12g and A1g at ∼356 and ∼420 cm–1, respectively, indicating high purity of material. The TEM analysis shows good crystalline quality of sample. The synthesized WS2 nanoparticle thin film based device shows good response to humidity and good photosensitivity along with good long-term stability of the device. It was found that the resistance of the films decreases with increasing relative humidity (RH). The maximum humidity sensitivity of 469% along with response time of ∼12 ...

Wafer-Scale, Homogeneous MoS2 Layers on Plastic Substrates for Flexible Visible-Light Photodetectors.

Abstract: An appropriate solution is suggested for synthesizing wafer-scale, continuous, and stoichiometric MoS2 layers with spatial homogeneity at the low temperature of 450 °C. It is also demonstrated that the MoS2 -based visible-light photodetector arrays are both fabricated on 4 inch SiO2 /Si wafer and polyimide films, revealing 100% active devices with a narrow photocurrent distribution and excellent mechanical durability.

Wafer-scale transferable molybdenum disulfide thin-film catalysts for photoelectrochemical hydrogen production

Abstract: We demonstrate that wafer-scale, transferable, and transparent thin-film catalysts based on MoS2, which consists of cheap and earth abundant elements, can provide a low onset potential of 1 mA cm−2 at 0.17 V versus a reversible hydrogen electrode and the high photocurrent density of 24.6 mA cm−2 at 0 V for a p-type Si photocathode. c-Domains with vertically stacked (100) planes in the transferable 2H-MoS2 thin films, which are grown via a thermolysis method, act as active sites for the hydrogen evolution reaction, and photogenerated electrons are efficiently transported through the n-MoS2/p-Si heterojunction.

Wafer-Scale and Wrinkle-Free Epitaxial Growth of Single-Orientated Multilayer Hexagonal Boron Nitride on Sapphire

Abstract: Large-scale growth of high-quality hexagonal boron nitride has been a challenge in two-dimensional-material-based electronics. Herein, we present wafer-scale and wrinkle-free epitaxial growth of multilayer hexagonal boron nitride on a sapphire substrate by using high-temperature and low-pressure chemical vapor deposition. Microscopic and spectroscopic investigations and theoretical calculations reveal that synthesized hexagonal boron nitride has a single rotational orientation with AA′ stacking order. A facile method for transferring hexagonal boron nitride onto other target substrates was developed, which provides the opportunity for using hexagonal boron nitride as a substrate in practical electronic circuits. A graphene field effect transistor fabricated on our hexagonal boron nitride sheets shows clear quantum oscillation and highly improved carrier mobility because the ultraflatness of the hexagonal boron nitride surface can reduce the substrate-induced degradation of the carrier mobility of two-dime...

Design, fabrication and characterisation of a 24.4% efficient interdigitated back contact solar cell

Abstract: The interdigitated back contact (IBC) solar cells developed at the Australian National University have resulted in an independently confirmed (Fraunhofer Institut fur Solare Energiesysteme (ISE) CalLab) designated-area efficiency of 24.4 ± 0.7%, featuring short-circuit current density of 41.95 mA/cm2, open-circuit voltage of 703 mV and 82.7% fill factor. The cell, 2 × 2 cm2 in area, was fabricated on a 230 µm thick 1.5 Ω cm n-type Czochralski wafer, utilising plasma-enhanced chemical vapour deposition (CVD) SiNx front-surface passivation without front-surface diffusion, rear-side thermal oxide/low-pressure CVD Si3N4 passivation stack and evaporated aluminium contacts with a finger-to-finger pitch of 500 µm. This paper describes the design and fabrication of lab-scale high-efficiency IBC cells. Characterisation of optical and electronic properties of the best produced cell is made, with subsequent incorporation into 3D device modelling used to accurately quantify all losses. Loss analysis demonstrates that bulk and emitter recombination, bulk resistive and optical losses are dominant and suggests a clear route to efficiency values in excess of 25%. Additionally, laser processing is explored as a means to simplify the manufacture of IBC cells, with a confirmed efficiency value of 23.5% recorded for cells fabricated using damage-free deep UV laser ablation for contact formation. Meanwhile all-laser-doped cells, where every doping and patterning step is performed by lasers, are demonstrated with a preliminary result of 19.1% conversion efficiency recorded. Copyright © 2014 John Wiley & Sons, Ltd.

Comeback of epitaxial graphene for electronics: Large-area growth of bilayer-free graphene on SiC

Abstract: We present a new fabrication method for epitaxial graphene on SiC which enables the growth of ultra-smooth defect- and bilayer-free graphene sheets with an unprecedented reproducibility, a necessary prerequisite for wafer-scale fabrication of high quality graphene-based electronic devices. The inherent but unfavorable formation of high SiC surface terrace steps during high temperature sublimation growth is suppressed by rapid formation of the graphene buffer layer which stabilizes the SiC surface. The enhanced nucleation is enforced by decomposition of deposited polymer adsorbate which acts as a carbon source. Unique to this method are the conservation of mainly 0.25 and 0.5 nm high surface steps and the formation of bilayer-free graphene on an area only limited by the size of the sample. This makes the polymer-assisted sublimation growth technique a promising method for commercial wafer scale epitaxial graphene fabrication. The extraordinary electronic quality is evidenced by quantum resistance metrology at 4.2 K showing ultra-high precision and high electron mobility on mm scale devices comparable to state-of-the-art graphene.

Engineering Solutions and Root-Cause Analysis for Light-Induced Degradation in p -Type Multicrystalline Silicon PERC Modules

Abstract: We identify two engineering solutions to mitigate light-induced degradation (LID) in p -type multicrystalline silicon passivated emitter and rear cells, including modification of metallization firing temperature and wafer quality. Lifetime measurements on etched-back samples confirm that LID has a strong bulk component. Spatially resolved lifetime maps indicate that the defects responsible for LID are dispersed ubiquitously across the wafer. Reversibility of LID upon low-temperature annealing suggests a low-activation-energy barrier inconsistent with precipitated impurity dissolution. Lifetime spectroscopy of the LID-affected state reveals an asymmetry of electron and hole capture cross sections of $\sim \text{28.5}$ , consistent with a deep-level donor point defect (e.g., interstitial Ti, interstitial Mo, substitutional W), charged nanoprecipitate, or charged structural defect, such as a dislocation. Finally, we explain two possible root causes of this LID, including 1) a point-defect complex involving a hydrogen atom and a deep-level donor and 2) configurational change of a point-defect complex involving fast-diffusing impurities.

Comeback of epitaxial graphene for electronics: large-area growth of bilayer-free graphene on SiC

Abstract: We present a new fabrication method for epitaxial graphene on SiC which enables the growth of ultra-smooth defect- and bilayer-free graphene sheets with an unprecedented reproducibility, a necessary prerequisite for wafer-scale fabrication of high quality graphene-based electronic devices. The inherent but unfavorable formation of high SiC surface terrace steps during high temperature sublimation growth is suppressed by rapid formation of the graphene buffer layer which stabilizes the SiC surface. The enhanced nucleation is enforced by decomposition of polymer adsorbates which act as a carbon source. With most of the steps well below 0.75 nm pure monolayer graphene without bilayer inclusions is formed with lateral dimensions only limited by the size of the substrate. This makes the polymer assisted sublimation growth technique the most promising method for commercial wafer scale epitaxial graphene fabrication. The extraordinary electronic quality is evidenced by quantum resistance metrology at 4.2 K with until now unreached precision and high electron mobilities on mm scale devices.

Lithium Fluoride Based Electron Contacts for High Efficiency n-Type Crystalline Silicon Solar Cells

Abstract: Low-resistance contact to lightly doped n-type crystalline silicon (c-Si) has long been recognized as technologically challenging due to the pervasive Fermi-level pinning effect This has hindered the development of certain devices such as n-type c-Si solar cells made with partial rear contacts (PRC) directly to the lowly doped c-Si wafer Here, a simple and robust process is demonstrated for achieving mΩ cm2 scale contact resistivities on lightly doped n-type c-Si via a lithium fluoride/aluminum contact The realization of this low-resistance contact enables the fabrication of a first-of-its-kind high-efficiency n-type PRC solar cell The electron contact of this cell is made to less than 1% of the rear surface area, reducing the impact of contact recombination and optical losses, permitting a power conversion efficiency of greater than 20% in the initial proof-of-concept stage The implementation of the LiFx/Al contact mitigates the need for the costly high-temperature phosphorus diffusion, typically implemented in such a cell design to nullify the issue of Fermi level pinning at the electron contact The timing of this demonstration is significant, given the ongoing transition from p-type to n-type c-Si solar cell architectures, together with the increased adoption of advanced PRC device structures within the c-Si photovoltaic industry

Wafer-scale growth of MoS2 thin films by atomic layer deposition

Abstract: The wafer-scale synthesis of MoS2 layers with precise thickness controllability and excellent uniformity is essential for their application in the nanoelectronics industry. Here, we demonstrate the atomic layer deposition (ALD) of MoS2 films with Mo(CO)6 and H2S as the Mo and S precursors, respectively. A self-limiting growth behavior is observed in the narrow ALD window of 155–175 °C. Long H2S feeding times are necessary to reduce the impurity contents in the films. The as-grown MoS2 films are amorphous due to the low growth temperature. Post-annealing at high temperatures under a H2S atmosphere efficiently improves the film properties including the crystallinity and chemical composition. An extremely uniform film growth is achieved even on a 4 inch SiO2/Si wafer. These results demonstrate that the current ALD process is well suited for the synthesis of MoS2 layers for application in industry.

Challenges and future perspectives in HVPE-GaN growth on ammonothermal GaN seeds

Abstract: Homoepitaxial growth of high structural quality and high-purity thick gallium nitride layers by crystallization from vapor phase (hydride vapor phase epitaxy (HVPE)) on 1, 1.5, and 2 inch substrates obtained by a solution (ammonothermal) growth method is presented. Advantages and disadvantages of both growth technologies are described in detail. Structural, optical, electrical, and thermal properties of gallium nitride grown from the vapor phase are demonstrated and compared to properties of ammonothermally grown material. It is shown that a synergy of these two methods can create new opportunities for an efficient production of bulk gallium nitride crystals and then substrates. It is also shown that free-standing (products of slicing procedures) gallium nitride crystals obtained from growth by vapor phase on ammonothermal substrates can be successfully used as seeds for the next growth process by both discussed methods. Factors limiting HVPE and making it a 'wafer to wafer' technology are presented, clarified, and analyzed. Intentional introduction of silicon to growth of gallium nitride by HVPE and crystals with a high free carrier concentration and high structural quality are demonstrated. First electronic and optoelectronic devices fabricated on the free-standing gallium nitride substrates are shown.

Wafer plate and mask arrangement for substrate fabrication

Abstract: A system for processing wafers in a vacuum processing chamber. Carrier comprising a frame having a plurality of openings, each opening configured to accommodate one wafer. A transport mechanism configured to transport the plurality of carriers throughout the system. A plurality of wafer plates configured for supporting wafers. An attachment mechanism for attaching a plurality of wafer plates to each of the carriers, wherein each of the wafer plates is attached to a corresponding position at an underside of a corresponding carrier, such that each of the wafers positioned on one of the wafer carriers is positioned within one of the plurality of opening in the carrier. Mask attached over front side of one of the plurality of opening in the carrier. Alignment stage supports wafer plate under the opening in the carrier. A camera positioned to simultaneously image the mask and the wafer.

Silicon Photonics R&D and Manufacturing on 300-mm Wafer Platform

Abstract: Industrial implementation of a silicon photonics platform using 300-mm SOI wafers and aiming at 100 Gb/s aggregate data-rate application is demonstrated. The integration strategy of electronic and photonic ICs, 300-mm process flow, and process variability are discussed, and performances of the passive and active optical devices are shown. An example of a low-cost LGA-based package together with a fiber assembly is given. RX and TX circuits operating at 25 Gb/s are demonstrated. Finally, the process evolution toward the integration of the backside reflector and multiple silicon etching level is demonstrated.

Diode laser for wafer heating for epi processes

Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for semiconductor processing, more particularly, to a thermal process chamber. The thermal process chamber may include a substrate support, a first plurality of heating elements disposed over the substrate support, and one or more high-energy radiant source assemblies disposed over the first plurality of heating elements. The one or more high-energy radiant source assemblies are utilized to provide local heating of cold regions on a substrate disposed on the substrate support during processing. Localized heating of the substrate improves temperature profile, which in turn improves deposition uniformity.

Impact of the firing temperature profile on light induced degradation of multicrystalline silicon

Abstract: Light- and elevated temperature-induced degradation in multicrystalline silicon can reduce the efficiency of solar cells significantly In this work, the influence of the firing process and its temperature profile on the degradation behaviour of neighbouring mc-Si wafers is analysed Five profiles with measured high peak temperatures ≥800 °C and varying heating and cooling ramps are examined With spatially resolved and lifetime calibrated photoluminescence images, normalized defect concentrations N*t are calculated to determine the degradation intensity Wafers that underwent a fast firing process typical for industrial solar cell production show a significantly stronger degradation than samples that were subjected to the same peak temperature but with slower heating and cooling rates A spatially resolved analysis of the carrier lifetime in the whole wafer shows that the degradation begins in low lifetime areas around dislocation clusters, spreading into good grains after several hours By the use of optimized ramp-up and/or ramp-down rates during the firing even at very high peak temperatures, light and elevated temperature induced degradation can be suppressed (© 2016 WILEY-VCH Verlag GmbH &Co KGaA, Weinheim)

Second-harmonic generation in periodically-poled thin film lithium niobate wafer-bonded on silicon.

Abstract: Second-order optical nonlinear effects (second-harmonic and sum-frequency generation) are demonstrated in the telecommunication band by periodic poling of thin films of lithium niobate wafer-bonded on silicon substrates and rib-loaded with silicon nitride channels to attain ridge waveguide with cross-sections of ~2 µm2. A nonlinear conversion of 8% is obtained with a pulsed input in 4 mm long waveguides. The choice of silicon substrate makes the platform potentially compatible with silicon photonics, and therefore may pave the path towards on-chip nonlinear and quantum-optic applications.

Big data analytics for forecasting cycle time in semiconductor wafer fabrication system

Abstract: In order to improve the prompt delivery reliability of the semiconductor wafer fabrication system, a big data analytics (BDA) is designed to predict wafer lots’ cycle time (CT), which is composed by four parts: data acquisition, data pre-processing, data analysing and data prediction. Firstly, the candidate feature set is constructed to collecting all features by analysing the material flow of wafer foundry. Subsequently, a data pre-processing technique is designed to extract, transform and load data from wafer lot transactions data-set. In addition, a conditional mutual information-based feature selection process is proposed to select key feature subset to reduce the dimension of data-set through data analysing without pre-knowledge. To handle the large volumes of data, a concurrent forecasting model is designed to predict the CT of wafer lots in parallel as well. According to the numerical analysis, the predict accuracy of the presented BDA improves clearly with the increase in data size. And, in the la...

Large area tunnel oxide passivated rear contact n‐type Si solar cells with 21.2% efficiency

Abstract: This paper reports on the implementation of carrier-selective tunnel oxide passivated rear contact for high-efficiency screen-printed large area n-type front junction crystalline Si solar cells. It is shown that the tunnel oxide grown in nitric acid at room temperature (25°C) and capped with n+ polysilicon layer provides excellent rear contact passivation with implied open-circuit voltage iVoc of 714 mV and saturation current density J0b′ of 10.3 fA/cm2 for the back surface field region. The durability of this passivation scheme is also investigated for a back-end high temperature process. In combination with an ion-implanted Al2O3-passivated boron emitter and screen-printed front metal grids, this passivated rear contact enabled 21.2% efficient front junction Si solar cells on 239 cm2 commercial grade n-type Czochralski wafers. Copyright © 2016 John Wiley & Sons, Ltd.

Optical wafer metrology sensors for process-robust CD and overlay control in semiconductor device manufacturing

Abstract: This paper presents three optical wafer metrology sensors that are used in lithography for robustly measuring the shape and position of wafers and device patterns on these wafers. The first two sensors are a level sensor and an alignment sensor that measure, respectively, a wafer height map and a wafer position before a new pattern is printed on the wafer. The third sensor is an optical scatterometer that measures critical dimension-variations and overlay after the resist has been exposed and developed. These sensors have different optical concepts but they share the same challenge that sub-nm precision is required at high throughput on a large variety of processed wafers and in the presence of unknown wafer processing variations. It is the purpose of this paper to explain these challenges in more detail and give an overview of the various solutions that have been introduced over the years to come to process-robust optical wafer metrology.

Wafer-Scale Single-Crystalline AB-Stacked Bilayer Graphene.

Abstract: Single-crystalline artificial AB-stacked bilayer graphene is formed by aligned transfer of two single-crystalline monolayers on a wafer-scale. The obtained bilayer has a well-defined interface and is electronically equivalent to exfoliated or direct-grown AB-stacked bilayers.

PMMA-Etching-Free Transfer of Wafer-scale Chemical Vapor Deposition Two-dimensional Atomic Crystal by a Water Soluble Polyvinyl Alcohol Polymer Method

Abstract: We have explored a facile technique to transfer large area 2-Dimensional (2D) materials grown by chemical vapor deposition method onto various substrates by adding a water-soluble Polyvinyl Alcohol (PVA) layer between the polymethyl-methacrylate (PMMA) and the 2D material film. This technique not only allows the effective transfer to an arbitrary target substrate with a high degree of freedom, but also avoids PMMA etching thereby maintaining the high quality of the transferred 2D materials with minimum contamination. We applied this method to transfer various 2D materials grown on different rigid substrates of general interest, such as graphene on copper foil, h-BN on platinum and MoS2 on SiO2/Si. This facile transfer technique has great potential for future research towards the application of 2D materials in high performance optical, mechanical and electronic devices.

Novel Ge waveguide platform on Ge-on-insulator wafer for mid-infrared photonic integrated circuits.

Abstract: We present Ge rib waveguide devices fabricated on a Ge-on-insulator (GeOI) wafer as a proof-of-concept Ge mid-infrared photonics platform. Numerical analysis revealed that the driving current for a given optical attenuation in a carrier-injection Ge waveguide device at a 1.95 μm wavelength can be approximately five times smaller than that in a Si device, enabling in-line carrier-injection Ge optical modulators based on free-carrier absorption. We prepared a GeOI wafer with a 2-μm-thick buried oxide layer (BOX) by wafer bonding. By using the GeOI wafer, we fabricated Ge rib waveguides. The Ge rib waveguides were transparent to 2 μm wavelengths and the propagation loss was found to be 1.4 dB/mm, which may have been caused by sidewall scattering. We achieved a negligible bend loss in the Ge rib waveguide, even with a 5 μm bend radius, owing to the strong optical confinement in the GeOI structure. We also formed a lateral p-i-n junction along the Ge rib waveguide to explore the capability of absorption modulation by carrier injection. By injecting current through the lateral p-i-n junction, we achieved optical intensity modulation in the 2 μm band based on the free-carrier absorption in Ge.