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Showing papers on "Wafer published in 2022"


Journal ArticleDOI
TL;DR: In this paper , the kinds of advanced packaging are ranked based on their interconnect density and electrical performance, and are grouped into 2-D, 2.1-D and 3-D IC integration.
Abstract: In this study, advanced packaging is defined. The kinds of advanced packaging are ranked based on their interconnect density and electrical performance, and are grouped into 2-D, 2.1-D, 2.3-D, 2.5-D, and 3-D IC integration, which will be presented and discussed. Chiplet design and heterogeneous integration packaging provide alternatives to the system on chips (especially for advanced nodes) will be discussed. Different substrates, such as size, pin-count, and metal linewidth and spacing for advanced packaging, are examined. The lateral communication between chiplets, such as the silicon bridges embedded in organic build-up package substrate and fan-out epoxy molding compound, as well as flexible bridges, will be presented. Fan-in packaging, such as the six-side molded wafer-level chip-scale package (WLCSP) and its comparison with the ordinary WLCSP, are presented. Fan-out packaging, such as the chip-first with die face-up, chip-first with die face-down, and chip-last and their difference, will be provided. Low-loss dielectric materials for high-speed and high-frequency applications in advanced packaging will be presented. Flip-chip assembly by mass reflow, thermocompression bonding, and bumpless hybrid bonding will be briefly mentioned first.

72 citations


Journal ArticleDOI
TL;DR: In this paper , the authors survey the key changes related to materials and industrial processing of silicon PV components and discuss what it will take for other PV technologies to compete with silicon on the mass market.
Abstract: Crystalline silicon (c-Si) photovoltaics has long been considered energy intensive and costly. Over the past decades, spectacular improvements along the manufacturing chain have made c-Si a low-cost source of electricity that can no longer be ignored. Over 125 GW of c-Si modules have been installed in 2020, 95% of the overall photovoltaic (PV) market, and over 700 GW has been cumulatively installed. There are some strong indications that c-Si photovoltaics could become the most important world electricity source by 2040–2050. In this Review, we survey the key changes related to materials and industrial processing of silicon PV components. At the wafer level, a strong reduction in polysilicon cost and the general implementation of diamond wire sawing has reduced the cost of monocrystalline wafers. In parallel, the concentration of impurities and electronic defects in the various types of wafers has been reduced, allowing for high efficiency in industrial devices. Improved cleanliness in production lines, increased tool automation and improved production technology and cell architectures all helped to increase the efficiency of mainstream modules. Efficiency gains at the cell level were accompanied by an increase in wafer size and by the introduction of advanced assembly techniques. These improvements have allowed a reduction of cell-to-module efficiency losses and will accelerate the yearly efficiency gain of mainstream modules. To conclude, we discuss what it will take for other PV technologies to compete with silicon on the mass market. Crystalline silicon solar cells are today’s main photovoltaic technology, enabling the production of electricity with minimal carbon emissions and at an unprecedented low cost. This Review discusses the recent evolution of this technology, the present status of research and industrial development, and the near-future perspectives.

67 citations



Journal ArticleDOI
TL;DR: In this paper , the authors demonstrate the wafer-scale synthesis of adlayer-free ultra-flat single-crystal monolayer graphene on sapphire substrates and demonstrate the epitaxial growth of graphene at the interface between Cu(111) and Al2O3(0001) by multi-cycle plasma etching assisted chemical vapour deposition.
Abstract: The growth of inch-scale high-quality graphene on insulating substrates is desirable for electronic and optoelectronic applications, but remains challenging due to the lack of metal catalysis. Here we demonstrate the wafer-scale synthesis of adlayer-free ultra-flat single-crystal monolayer graphene on sapphire substrates. We converted polycrystalline Cu foil placed on Al2O3(0001) into single-crystal Cu(111) film via annealing, and then achieved epitaxial growth of graphene at the interface between Cu(111) and Al2O3(0001) by multi-cycle plasma etching-assisted-chemical vapour deposition. Immersion in liquid nitrogen followed by rapid heating causes the Cu(111) film to bulge and peel off easily, while the graphene film remains on the sapphire substrate without degradation. Field-effect transistors fabricated on as-grown graphene exhibited good electronic transport properties with high carrier mobilities. This work breaks a bottleneck of synthesizing wafer-scale single-crystal monolayer graphene on insulating substrates and could contribute to next-generation graphene-based nanodevices.

59 citations


Journal ArticleDOI
TL;DR: In this article , a perovskite-silicon tandem solar cells with periodic nanotextures were presented, which showed a reduction in reflection losses in comparison to planar tandems.
Abstract: Abstract Perovskite–silicon tandem solar cells offer the possibility of overcoming the power conversion efficiency limit of conventional silicon solar cells. Various textured tandem devices have been presented aiming at improved optical performance, but optimizing film growth on surface-textured wafers remains challenging. Here we present perovskite–silicon tandem solar cells with periodic nanotextures that offer various advantages without compromising the material quality of solution-processed perovskite layers. We show a reduction in reflection losses in comparison to planar tandems, with the new devices being less sensitive to deviations from optimum layer thicknesses. The nanotextures also enable a greatly increased fabrication yield from 50% to 95%. Moreover, the open-circuit voltage is improved by 15 mV due to the enhanced optoelectronic properties of the perovskite top cell. Our optically advanced rear reflector with a dielectric buffer layer results in reduced parasitic absorption at near-infrared wavelengths. As a result, we demonstrate a certified power conversion efficiency of 29.80%.

46 citations




Journal ArticleDOI
TL;DR: In this article , the state-of-the-art β-Ga 2 O 3 Schottky barrier diodes and field-effect transistors are discussed, mainly focusing on development results of the author's group.
Abstract: Abstract Rapid progress in β -gallium oxide ( β -Ga 2 O 3 ) material and device technologies has been made in this decade, and its superior material properties based on the very large bandgap of over 4.5 eV have been attracting much attention. β -Ga 2 O 3 appears particularly promising for power switching device applications because of its extremely large breakdown electric field and availability of large-diameter, high-quality wafers manufactured from melt-grown bulk single crystals. In this review, after introducing material properties of β -Ga 2 O 3 that are important for electronic devices, current status of bulk melt growth, epitaxial thin-film growth, and device processing technologies are introduced. Then, state-of-the-art β -Ga 2 O 3 Schottky barrier diodes and field-effect transistors are discussed, mainly focusing on development results of the author’s group.

33 citations


Journal ArticleDOI
TL;DR: In this paper , a molecular level nanotechnology is developed by designing NiOx/2PACz ([2.9H]-carbazol]-9yl) ethyl]phosphonic acid as an ultrathin hybrid hole transport layer (HTL) above indium tin oxide (ITO) recombination junction, to serve as a vital pivot for achieving a conformal deposition of high-quality perovskite layer on top.
Abstract: Perovskite/silicon tandem solar cells are promising avenues for achieving high‐performance photovoltaics with low costs. However, the highest certified efficiency of perovskite/silicon tandem devices based on economically matured silicon heterojunction technology (SHJ) with fully textured wafer is only 25.2% due to incompatibility between the limitation of fabrication technology which is not compatible with the production‐line silicon wafer. Here, a molecular‐level nanotechnology is developed by designing NiOx/2PACz ([2‐(9H‐carbazol‐9‐yl) ethyl]phosphonic acid) as an ultrathin hybrid hole transport layer (HTL) above indium tin oxide (ITO) recombination junction, to serve as a vital pivot for achieving a conformal deposition of high‐quality perovskite layer on top. The NiOx interlayer facilitates a uniform self‐assembly of 2PACz molecules onto the fully textured surface, thus avoiding direct contact between ITO and perovskite top‐cell for a minimal shunt loss. As a result of such interfacial engineering, the fully textured perovskite/silicon tandem cells obtain a certified efficiency of 28.84% on a 1.2‐cm2 masked area, which is the highest performance to date based on the fully textured, production‐line compatible SHJ. This work advances commercially promising photovoltaics with high performance and low costs by adopting a meticulously designed HTL/perovskite interface.

33 citations


Journal ArticleDOI
TL;DR: In this article , a solution-processed two-dimensional MoS 2 memristor arrays are reported to achieve excellent endurance, long memory retention, low device variations, and high analog on/off ratio with linear conductance update characteristics.
Abstract: Abstract Realization of high-density and reliable resistive random access memories based on two-dimensional semiconductors is crucial toward their development in next-generation information storage and neuromorphic computing. Here, wafer-scale integration of solution-processed two-dimensional MoS 2 memristor arrays are reported. The MoS 2 memristors achieve excellent endurance, long memory retention, low device variations, and high analog on/off ratio with linear conductance update characteristics. The two-dimensional nanosheets appear to enable a unique way to modulate switching characteristics through the inter-flake sulfur vacancies diffusion, which can be controlled by the flake size distribution. Furthermore, the MNIST handwritten digits recognition shows that the MoS 2 memristors can operate with a high accuracy of >98.02%, which demonstrates its feasibility for future analog memory applications. Finally, a monolithic three-dimensional memory cube has been demonstrated by stacking the two-dimensional MoS 2 layers, paving the way for the implementation of two memristor into high-density neuromorphic computing system.

33 citations



Journal ArticleDOI
TL;DR: In this article , the state-of-the-art β-Ga 2 O 3 Schottky barrier diodes and field-effect transistors are discussed, mainly focusing on development results of the author's group.
Abstract: Abstract Rapid progress in β -gallium oxide ( β -Ga 2 O 3 ) material and device technologies has been made in this decade, and its superior material properties based on the very large bandgap of over 4.5 eV have been attracting much attention. β -Ga 2 O 3 appears particularly promising for power switching device applications because of its extremely large breakdown electric field and availability of large-diameter, high-quality wafers manufactured from melt-grown bulk single crystals. In this review, after introducing material properties of β -Ga 2 O 3 that are important for electronic devices, current status of bulk melt growth, epitaxial thin-film growth, and device processing technologies are introduced. Then, state-of-the-art β -Ga 2 O 3 Schottky barrier diodes and field-effect transistors are discussed, mainly focusing on development results of the author’s group.

Journal ArticleDOI
TL;DR: In this article, the lifetime limitation due to Auger recombination in a single-junction crystalline silicon solar cell was derived using a physically motivated equation based on Coulombenhanced Auger-enhanced recombination for all doping and injection conditions.

Journal ArticleDOI
TL;DR: In this paper , an etching structure that exploits anisotropic charge carrier flow to enable high-throughput, external bias-free wet etching of high-aspect-ratio SiC micro/nano-structures is demonstrated.
Abstract: Wet etching of silicon carbide typically exhibits poor etching efficiency and low aspect ratio. In this study, an etching structure that exploits anisotropic charge carrier flow to enable high‐throughput, external‐bias‐free wet etching of high‐aspect‐ratio SiC micro/nano‐structures is demonstrated. Specifically, by applying a catalytic metal coating at the bottom surface of a SiC wafer while introducing patterned ultraviolet light illumination from its top surface, spatial charge separation across the wafer is achieved, i.e., photogenerated electrons are channeled to the bottom to participate in the reduction reaction of an oxidant in the etchant solution, while holes flow to the top to trigger oxidation of SiC and subsequent etching. Such design largely suppresses recombination‐induced charge losses, and when used in combination with a top metal catalyst mask, the structure yields a remarkable vertical etching rate of 0.737 µm min−1 and an aspect ratio of 3.2, setting new records for wet‐etching methods for SiC.

Journal ArticleDOI
TL;DR: In this paper , the influence of Al-graded p-type multi-quantum-barrier electron blocking layer (Al-grad p-MQB EBL) on the generation and injection of 3D holes in the active region was investigated.
Abstract: Crystal growth of eco-friendly, ultrawide bandgap aluminium gallium nitride (AlGaN) semiconductor-based ultraviolet-B (UVB) light-emitting diodes (LEDs) hold the potential to replace toxic mercury-based ultraviolet lamps. One of the major drawbacks in the utilisation of AlGaN-based UVB LEDs is their low efficiency of about 6.5%. The study investigates the influence of Al-graded p-type multi-quantum-barrier electron-blocking-layer (Al-grad p-MQB EBL) and Al-graded p-AlGaN hole source layer (HSL) on the generation and injection of 3D holes in the active region. Using the new UVB LED design, a significant improvement in the experimental efficiency and light output power of about 8.2% and 36 mW is noticed. This is accomplished by the transparent nature of Al-graded Mg-doped p-AlGaN HSL for 3D holes generation and p-MQB EBL structure for holes transport toward multi-quantum-wells via intra-band tunnelling. Based on both the numerical and experimental studies, the influence of sub-nanometre scale Ni film deposited underneath the 200 nm-thick Al-film p-electrode on the optical reflectance in UVB LED is investigated. A remarkable improvement in the efficiency of up to 9.6% and light output power of 40 mW, even in the absence of standard package, flip-chip, and resin-like lenses, is achieved on bare-wafer under continuous-wave operation at room temperature. The enhanced performance is attributed to the use of Al-graded p-MQB EBL coupled with softly polarised p-AlGaN HSL and the highly reflective 0.4 nm-thick Ni and 200 nm-thick Al p-electrode in the UVB LED. This research study provides a new avenue to improve the performance of high-power p-AlGaN-based UVB LEDs and other optoelectronic devices in III-V semiconductors.

Journal ArticleDOI
TL;DR: In this paper , the lifetime limitation due to Auger recombination in a single-junction crystalline silicon solar cell was derived using a physically motivated equation based on Coulombenhanced Auger-enhanced recombination for all doping and injection conditions.

Journal ArticleDOI
TL;DR: In this paper , the most recent significant concerns of 2D materials in the provided prose and attempted to highlight the prerequisites for synthesis, yield, and mechanism behind device-to-device variability, reliability, and durability benchmarking under memristors characteristics; also indexed some useful approaches that have already been reported to be advantageous in large-scale production.
Abstract: The family of two-dimensional (2D) materials composed of atomically thin layers connected via van der Waals interactions has attracted much curiosity due to a variety of intriguing physical, optical, and electrical characteristics. The significance of analyzing statistics on electrical devices and circuits based on 2D materials is seldom underestimated. Certain requirements must be met to deliver scientific knowledge that is beneficial in the field of 2D electronics: synthesis and fabrication must occur at the wafer level, variations in morphology and lattice alterations must be visible and statistically verified, and device dimensions must be appropriate. The authors discussed the most recent significant concerns of 2D materials in the provided prose and attempted to highlight the prerequisites for synthesis, yield, and mechanism behind device-to-device variability, reliability, and durability benchmarking under memristors characteristics; they also indexed some useful approaches that have already been reported to be advantageous in large-scale production. Commercial applications, on the other hand, will necessitate further effort.

Journal ArticleDOI
TL;DR: In this paper , 2D van der Waals materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties.
Abstract: 2D van der Waals (vdW) materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties. Furthermore, two or more building blocks of different electronic types can be stacked vertically to generate vdW heterostructures with desired electrical behaviors. However, such fundamental approaches cannot directly be applied practically because of issues such as precise alignment/positioning and large-quantity material production. Here, these limitations are overcome and wafer-scale vdW heterostructures are demonstrated by exploiting the lateral and vertical assembly of solution-processed 2D vdW materials. The high exfoliation yield of the molecular intercalation-assisted approach enables the production of micrometer-sized nanosheets in large quantities and its lateral assembly in a wafer-scale via vdW interactions. Subsequently, the laterally assembled vdW thin-films are vertically assembled to demonstrate various electronic device applications, such as transistors and photodetectors. Furthermore, multidimensional vdW heterostructures are demonstrated by integrating 1D carbon nanotubes as a p-type semiconductor to fabricate p-n diodes and complementary logic gates. Finally, electronic devices are fabricated via inkjet printing as a lithography-free manner based on the stable nanomaterial dispersions.


Journal ArticleDOI
Haotong Wei1
TL;DR: In this article , an oriented bulk 2D wafer with a large area of 1.33 cm2 was obtained by tableting disordered 2D perovskite powders, resulting in anisotropic resistivities of 5 × 1010 and 2 × 1011 Ω cm in the lateral and vertical directions, respectively.
Abstract: 2D perovskite single crystals have emerged as excellent optoelectronic materials owing to their unique anisotropic properties. However, growing large 2D perovskite single crystals remains challenging and time-consuming. Here, a new composition of lead-free 2D perovskite-4-fluorophenethylammonium bismuth iodide [(F-PEA)3 BiI6 ] is reported. An oriented bulk 2D wafer with a large area of 1.33 cm2 is obtained by tableting disordered 2D perovskite powders, resulting in anisotropic resistivities of 5 × 1010 and 2 × 1011 Ω cm in the lateral and vertical directions, respectively. Trivalent Bi3+ ions are employed to achieve a stronger ionic bonding energy with I- ions, which intrinsically suppress the ion-migration effect. Thus, the oriented wafer presents good capabilities in both charge collection and ion-migration suppression under a large applied bias along the out-of-plane direction, making it suitable for low-dosage X-ray detection. The large-area wafer shows a sensitive response to hard X-rays operated at a tube voltage of 120 kVp with the lowest detectable dose rate of 30 nGy s-1 . Thus, the fast tableting process is a facile and effective strategy to synthesize large-area, oriented 2D wafers, showing excellent X-ray detection performance and operational stability that are comparable to those of 2D perovskite single crystals.

Journal ArticleDOI
TL;DR: In this paper , a large-area -C=N- linked two-dimensional (2D) COF films with controllable thicknesses via vapor induced conversion in a chemical vapor deposition (CVD) system are reported.
Abstract: Covalent organic frameworks (COFs) can exhibit high specific surface area and catalytic activity, but traditional solution-based synthesis methods often lead to insoluble and infusible powders or fragile films on solution surface. Herein we report large-area -C=N- linked two-dimensional (2D) COF films with controllable thicknesses via vapor induced conversion in a chemical vapor deposition (CVD) system. The assembly process is achieved by reversible Schiff base polycondensation between PyTTA film and TPA vapor, which results in a uniform organic framework film directly on growth substrate, and is driven by π-π stacking interactions with the aid of water and acetic acid. Wafer-scale 2D COF films with different structures have been successfully synthesized by adjusting their building blocks, suggesting its generic applicability. The carrier mobility of PyTTA-TPA COF films can reach 1.89 × 10-3 cm2 V-1 s-1. When employed as catalysts in hydrogen evolution reaction (HER), they show high electrocatalytic activity compared with metal-free COFs or even some metallic catalysts. Our results represent a versatile route for the direct construction of large-area uniform 2D COF films on substrates towards multi-functional applications of 2D π-conjugated systems.

Journal ArticleDOI
TL;DR: In this paper , a volume of fluid (VOF) model of bubble motions in laser-induced plasma micro-machining was established to simulate the dynamical behavior of bubbles under different depths of water layer, which reflect the growth of microbubbles, the aggregation of multiple bubbles, and the floating movement of bubbles.
Abstract: Abstract Laser-induced plasma micro-machining (LIPMM) process does well in fabricating high-quality surface microstructures of hard and brittle materials. However, the liquid medium is overheated to induce lots of bubbles to defocus the laser beam, reducing machining stability, and explosive behavior of bubbles destroys the surface quality. Thus, the static and dynamical behaviors of bubbles in LIPMM are comprehensively investigated in this article. First, a series of mechanisms including bubble generation and growth, bubble motion and explosion, and the effect of bubbles behavior on machining characteristics were explained. Second, a volume of fluid (VOF) model of bubble motions in laser-induced plasma micro-machining was established to simulate the dynamical behavior of bubbles under different depths of water layer, which reflect the growth of microbubbles, the aggregation of multiple bubbles, and the floating movement of bubbles. Then, a series of experiments were carried out to reveal bubble static behaviors, and further bubble explosion behaviors on surface integrity, surface defects, and hardness were analyzed. The increase of laser frequency leads to the increase of the maximum attached bubble size. Obstructed by bubble dynamical behaviors, a discontinuous section and the unablated area are observed in the microchannel. The elastic modulus and surface hardness of surface impacted by explosion bubbles are reduced. This research contributes to better understanding bubble behavior related to machining performances in LIPMM of single-crystal silicon.

Journal ArticleDOI
TL;DR: In this paper , a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature is presented, achieving a high field effect mobility of 30.9 cm 2 V −1 s −1 and an I ON/OFF ratio of 5.8 × 10 5 with 4-inch wafer-scale integrity on a SiO 2 /Si substrate.
Abstract: Abstract Achieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm 2 V −1 s −1 and an I ON/OFF ratio of 5.8 × 10 5 with 4-inch wafer-scale integrity on a SiO 2 /Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

Journal ArticleDOI
TL;DR: In this paper , a single-step femtosecond laser scanning technique was used to obtain wafer-scale, highly regular nanogratings on semiconductor-on-metal thin films.
Abstract: Abstract It is always a great challenge to bridge the nano- and macro-worlds in nanoscience, for instance, manufacturing uniform nanogratings on a whole wafer in seconds instead of hours even days. Here, we demonstrate a single-step while extremely high-throughput femtosecond laser scanning technique to obtain wafer-scale, highly regular nanogratings on semiconductor-on-metal thin films. Our technique takes advantage of long-range surface plasmons-laser interference, which is regulated by a self-initiated seed. By controlling the scanning speed, two types of nanogratings are readily manufactured, which are produced by either oxidation or ablation. We achieve a record manufacturing speed (>1 cm 2 s −1 ), with tunable periodicity of Λ < 1 µm. The fractional variation of their periodicity is evaluated to be as low as ∆ Λ/Λ ≈ 0.5%. Furthermore, by utilizing the semiconductor-on-metal film-endowed interference effects, an extremely high energy efficiency is achieved via suppressing light reflection during femtosecond laser nano-processing. As the fabricated nanogratings exhibit multi-functionality, we exemplify their practical applications in highly sensitive refractive index sensing, vivid structural colors, and durable superhydrophilicity.

Journal ArticleDOI
TL;DR: A review of van der Waal (vdW) layered 2D materials in high-end electronics and optoelectronics can be found in this article , where three strategies are summarized that enable 2D film growth with a single-crystalline structure over the whole wafer: growth of isolated domains, growth of unidirectional domains, and conversion of oriented precursors.
Abstract: Wafer-scale growth has become a critical bottleneck for scaling up applications of van der Waal (vdW) layered 2D materials in high-end electronics and optoelectronics. Most vdW 2D materials are initially obtained through top-down synthesis methods, such as exfoliation, which can only prepare small flakes on a micrometer scale. Bottom-up growth can enable 2D flake growth over a large area. However, seamless merging of these flakes to form large-area continuous films with well-controlled layer thickness and lattice orientation is still a significant challenge. This review briefly introduces several vdW layered 2D materials covering their lattice structures, representative physical properties, and potential roles in large-scale applications. Then, several methods used to grow vdW layered 2D materials at the wafer scale are reviewed in depth. In particular, three strategies are summarized that enable 2D film growth with a single-crystalline structure over the whole wafer: growth of an isolated domain, growth of unidirectional domains, and conversion of oriented precursors. After that, the progress in using wafer-scale 2D materials in integrated devices and advanced epitaxy is reviewed. Finally, future directions in the growth and scaling of vdW layered 2D materials are discussed.

Journal ArticleDOI
TL;DR: High-NA extreme ultraviolet (EUV) lithography is currently in development at ASML and Carl Zeiss as discussed by the authors , which results in wafer field sizes of 26 mm × 16.5 mm, half that of lower NA EUV tools and optical scanners.
Abstract: High-NA extreme ultraviolet (EUV) lithography is currently in development. Fabrication of exposure tools and optics with a numerical aperture (NA) equal to 0.55 has started at ASML and Carl Zeiss. Lenses with such high NA will have very small depths-of-focus, which will require improved focus systems and significant improvements in wafer flatness during processing. Lenses are anamorphic to address mask 3D issues, which results in wafer field sizes of 26 mm × 16.5 mm, half that of lower NA EUV tools and optical scanners. Production of large die will require stitching. Computational infrastructure is being created to support high-NA lithography, including simulators that use Tatian polynomials to characterize the aberrations of lenses with central obscurations. High resolution resists that meet the line-edge roughness and defect requirements for high-volume manufacturing also need to be developed. High power light sources will also be needed to limit photon shot noise.

Journal ArticleDOI
TL;DR: In this paper , the authors reported the synthesis of 2D GeSe 2 layers with precise layer control and customized patterns via a facile post-annealing approach, which reveals a layer-independent direct bandgap of ~3.0 eV.

Journal ArticleDOI
TL;DR: In this article , a high-performance MXene image sensor array fabricated by a wafer-scale combination patterning method of an MXene film is reported, which combines MXene centrifugation, spin-coating, photolithography, and dry-etching and is highly compatible with mainstream semiconductor processing.
Abstract: As a rapidly growing family of 2D transition metal carbides and nitrides, MXenes are recognized as promising materials for the development of future electronics and optoelectronics. So far, the reported patterning methods for MXene films lack efficiency, resolution, and compatibility, resulting in limited device integration and performance. Here, a high‐performance MXene image sensor array fabricated by a wafer‐scale combination patterning method of an MXene film is reported. This method combines MXene centrifugation, spin‐coating, photolithography, and dry‐etching and is highly compatible with mainstream semiconductor processing, with a resolution up to 2 µm, which is at least 100 times higher than other large‐area patterning methods reported previously. As a result, a high‐density integrated array of 1024‐pixel Ti3C2Tx/Si photodetectors with a detectivity of 7.73 × 1014 Jones and a light–dark current ratio (Ilight/Idark) of 6.22 × 106, which is the ultrahigh value among all reported MXene‐based photodetectors, is fabricated. This patterning technique paves a way for large‐scale high‐performance MXetronics compatible with mainstream semiconductor processes.

Journal ArticleDOI
TL;DR: In this article , the advantages and disadvantages of various flexible substrates that have been utilized for the design of H2O2 sensors were discussed, and future perspectives on how to address some of the substrate limitations and examples of application-driven sensors are also discussed.
Abstract: Hydrogen peroxide (H2O2) is a common chemical used in many industries and can be found in various biological environments, water, and air. Yet, H2O2 in a certain range of concentrations can be hazardous and toxic. Therefore, it is crucial to determine its concentration at different conditions for safety and diagnostic purposes. This review provides an insight about different types of sensors that have been developed for detection of H2O2. Their flexibility, stability, cost, detection limit, manufacturing, and challenges in their applications have been compared. More specifically the advantages and disadvantages of various flexible substrates that have been utilized for the design of H2O2 sensors were discussed. These substrates include carbonaceous substrates (e.g., reduced graphene oxide films, carbon cloth, carbon, and graphene fibers), polymeric substrates, paper, thin glass, and silicon wafers. Many of these substrates are often decorated with nanostructures composed of Pt, Au, Ag, MnO2, Fe3O4, or a conductive polymer to enhance the performance of sensors. The impact of these nanostructures on the sensing performance of resulting flexible H2O2 sensors has been reviewed in detail. In summary, the detection limits of these sensors are within the range of 100 nM–1 mM, which makes them potentially, but not necessarily, suitable for applications in health, food, and environmental monitoring. However, the required sample volume, cost, ease of manufacturing, and stability are often neglected compared to other detection parameters, which hinders sensors’ real-world application. Future perspectives on how to address some of the substrate limitations and examples of application-driven sensors are also discussed.

Journal ArticleDOI
09 Feb 2022-ACS Nano
TL;DR: In this paper , a spray-deposited two-dimensional transition metal carbides (MXenes) are used as rear electrodes for silicon heterojunction solar cells as a proof of concept.
Abstract: Two-dimensional transition metal carbides (MXenes) are of great interest as electrode materials for a variety of applications, including solar cells, due to their tunable optoelectronic properties, high metallic conductivity, and attractive solution processability. However, thus far, MXene electrodes have only been exploited for lab-scale device applications. Here, to demonstrate the potential of MXene electrodes at an industry-relevant level, we implemented a scalable spray coating technique to deposit highly conductive (ca. 8000 S/cm, at a ca. 55 nm thickness) Ti3C2Tx films (Tx: surface functional groups, i.e., −OH, −O, −F) via an automated spray system. We employed these Ti3C2Tx films as rear electrodes for silicon heterojunction solar cells as a proof of concept. The spray-deposited MXene flakes have formed a conformal coating on top of the indium tin oxide (ITO)-coated random pyramidal textured silicon wafers, leading to >20% power conversion efficiency (PCE) over both medium-sized (4.2 cm2) and large (243 cm2, i.e., industry-sized 6 in. pseudosquare wafers) cell areas. Notably, the Ti3C2Tx-rear-contacted devices have retained around 99% of their initial PCE for more than 600 days of ambient air storage. Their performance is comparable with state-of-the-art solar cells contacted with sputtered silver electrodes. Our findings demonstrate the high-throughput potential of spray-coated MXene-based electrodes for solar cells in addition to a wider variety of electronic device applications.