Topic
Wire bonding
About: Wire bonding is a research topic. Over the lifetime, 16341 publications have been published within this topic receiving 150251 citations.
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TL;DR: In this article, a patterned silver microelectrodes by omnidirectional printing of concentrated nanoparticle inks in both uniform and high-aspect ratio motifs with minimum widths of approximately 2 micrometers onto semiconductor, plastic, and glass substrates is demonstrated.
Abstract: Flexible, stretchable, and spanning microelectrodes that carry signals from one circuit element to another are needed for many emerging forms of electronic and optoelectronic devices. We have patterned silver microelectrodes by omnidirectional printing of concentrated nanoparticle inks in both uniform and high-aspect ratio motifs with minimum widths of approximately 2 micrometers onto semiconductor, plastic, and glass substrates. The patterned microelectrodes can withstand repeated bending and stretching to large levels of strain with minimal degradation of their electrical properties. With this approach, wire bonding to fragile three-dimensional devices and spanning interconnects for solar cell and light-emitting diode arrays are demonstrated.
1,103 citations
Book•
01 Sep 1987TL;DR: An overview of microelectronic fabrication can be found in this paper, where the authors provide a historical perspective on the development and evolution of many of the technologies used in the fabrication process.
Abstract: (NOTE: Each chapter concludes with Summary, References, and Problems) Preface 1 An Overview of Microelectronic Fabrication A Historical Perspective An Overview of Monolithic Fabrication Processes and Structures Metal-Oxide-Semiconductor (MOS) Processes Basic Bipolar Processing Safety 2 Lithography The Photolithographic Process Etching Techniques Photomask Fabrication Exposure Systems Exposure Sources Optical and Electron Microscopy Further Reading 3 Thermal Oxidation of Silicon The Oxidation Process Modeling Oxidation Factors Influencing Oxidation Rate Dopant Redistribution During Oxidation Masking Properties of Silicon Dioxide Technology of Oxidation Oxide Quality Selective Oxidation and Shallow Trench Formation Oxide Thickness Characterization Process Simulation 4 Diffusion The Diffusion Process Mathematical Model for Diffusion The Diffusion Coefficient Successive Diffusions Solid-Solubility Limits Junction Formation and Characterization Sheet Resistance Generation-Depth and Impurity Profile Measurement Diffusion Simulation Diffusion Systems Gettering 5 Ion Implantation Implantation Technology Mathematical Model for Ion Implantation Selective Implantation Junction Depth and Sheet Resistance Channeling, Lattice Damage, and Annealing Shallow Implantation Source Listing 6 Film Deposition Evaporation Sputtering Chemical Vapor Deposition Epitaxy Further Reading 7 Interconnections and Contacts Interconnections in Integrated Circuits Metal Interconnections and Contact Technology Diffused Interconnections Polysilicon Interconnections and Buried Contacts Silicides and Multilayer-Contact Technology The Liftoff Process Multilevel Metallization Copper Interconnects and Damascene Processes Further Reading 8 Packaging and Yield Testing Wafer Thinning and Die Separation Die Attachment Wire Bonding Packages Flip-Chip and Tape-Automated-Bonding Processes Yield Further Reading 9 MOS Process Integration Basic MOS Device Considerations MOS Transistor Layout and Design Rules Complementary MOS (CMOS) Technology Silicon on Insulator 10 Bipolar Process Integration The Junction-Isolated Structure Current Gain Transit Time Basewidth Breakdown Voltages Other Elements in SBC Technology Layout Considerations Advanced Bipolar Structures Other Bipolar Isolation Techniques BICMOS 11 Processes for Microelectromechanical Systems-MEMS Mechanical Properties of Silicon Bulk Micromachining Silicon Etchants Surface Micromachining High-Aspect-Ratio Micromachining: The LIGA Molding Process Silicon Wafer Bonding IC Process Compatibility Answers to Selected Problems Index
721 citations
TL;DR: Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.
Abstract: When mirror-polished, flat, and clean wafers of almost any material are brought into contact at room temperature, they are locally attracted to each other by van der Waals forces and adhere or bond. This phenomenon is referred to as wafer bonding. The most prominent applications of wafer bonding are silicon-on-insulator (SOI) devices, silicon-based sensors and actuators, as well as optical devices. The basics of wafer-bonding technology are described, including microcleanroom approaches, prevention of interface bubbles, bonding of III-V compounds, low-temperature bonding, ultra-high vacuum bonding, thinning methods such as smart-cut procedures, and twist wafer bonding for compliant substrates. Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.
658 citations
Book•
23 Nov 1998
TL;DR: In this paper, the authors present the basic interactions between flat surfaces, including the influence of Particles, Surface Steps, and Cavities, and thermal treatment of Bonded Wafer Pairs.
Abstract: Basics of Interactions Between Flat Surfaces. Influence of Particles, Surface Steps, and Cavities. Surface Preparation and Room-Temperature Wafer Bonding. Thermal Treatment of Bonded Wafer Pairs. Thinning Procedures. Electrical Properties of Bonding Interfaces. Stresses in Bonded Wafers. Bonding of Dissimilar Materials. Bonding of Structured Wafers. Mainstream Applications. Emerging and Future Applications. Index.
602 citations
Patent•
23 Dec 2002
TL;DR: In this article, a method for making a wire package for use as staples or brads is recited as forming a plurality of round wires, forming a flattened bonding sides on each wire, and bonding each wire to an adjacent wire by adhering the surfaces of each wire.
Abstract: A method for making a wire package for use as staples or brads is recited as forming a plurality of round wires, forming a plurality of flattened bonding sides on each wire to prepare even bonding surfaces on each wire and bonding each wire to an adjacent wire by adhering the surfaces of each wire Each staple includes two or more flat surfaces to improve the bonding strength of each staple A package of diverging staples or brads are formed using the flat bonding surfaces
598 citations