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X-ray lithography

About: X-ray lithography is a research topic. Over the lifetime, 5302 publications have been published within this topic receiving 70850 citations.


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Journal ArticleDOI
TL;DR: In the present application, graphene samples on Si/SiO2 substrates are cut using helium ions, with computer controlled alignment, patterning, and exposure, providing fast lithography compatible with graphene, with approximately 15 nm feature sizes.
Abstract: We report nanoscale patterning of graphene using a helium ion microscope configured for lithography. Helium ion lithography is a direct-write lithography process, comparable to conventional focused ion beam patterning, with no resist or other material contacting the sample surface. In the present application, graphene samples on Si/SiO2 substrates are cut using helium ions, with computer controlled alignment, patterning, and exposure. Once suitable beam doses are determined, sharp edge profiles and clean etching are obtained, with little evident damage or doping to the sample. This technique provides fast lithography compatible with graphene, with approximately 15 nm feature sizes.

359 citations

Journal ArticleDOI
TL;DR: In this paper, the authors report sub-nanometer linewidth uniformity in silicon nanophotonics devices fabricated using high-volume CMOS fabrication tools, using wavelength-selective devices such as ring resonators, Mach-Zehnder interferometers, and arrayed waveguide gratings to assess the device nonuniformity within and between chips.
Abstract: We report subnanometer linewidth uniformity in silicon nanophotonics devices fabricated using high-volume CMOS fabrication tools. We use wavelength-selective devices such as ring resonators, Mach-Zehnder interferometers, and arrayed waveguide gratings to assess the device nonuniformity within and between chips. The devices were fabricated using 193 or 248 nm optical lithography and dry etching in silicon-on-insulator wafer technology. Using 193 nm optical lithography, we have achieved a linewidth uniformity of 2 nm (after lithography) and 2.6 nm (after dry etch) over 200 mm wafer. Furthermore, with the developed fabrication process, using wavelength-selective devices, we have demonstrated a linewidth control better than 0.6 nm within chip and better than 2 nm chip-to-chip. The necessity for high-resolution optical lithography is demonstrated by comparing device nonuniformity between the 248 and 193 nm optical lithography processes.

311 citations

Journal ArticleDOI
TL;DR: In this article, the physical principles underlying ion beam interactions with materials are described, together with a comparison with other lithographic techniques (electron beam writing a, p-beam writing, and ion projection projection lithography).
Abstract: To overcome the diffraction constraints of traditional optical lithography, the next generation lithographies (NGLs) will utilize any one or more of EUV (extreme ultraviolet), X-ray, electron or ion beam technologies to produce sub-100 nm features. Perhaps the most under-developed and under-rated is the utilization of ions for lithographic purposes. All three ion beam techniques, FIB (Focused Ion Beam), Proton Beam Writing (p-beam writing) and Ion Projection Lithography (IPL) have now breached the technologically difficult 100 nm barrier, and are now capable of fabricating structures at the nanoscale. FIB, p-beam writing and IPL have the flexibility and potential to become leading contenders as NGLs. The three ion beam techniques have widely different attributes, and as such have their own strengths, niche areas and application areas. The physical principles underlying ion beam interactions with materials are described, together with a comparison with other lithographic techniques (electron beam writing a...

283 citations

Journal ArticleDOI
TL;DR: In this article, two-photon lithography in negative SU-8 photoresist was used to obtain mechanically stable, stress-free, extended nanorods having lateral sizes of about 30 nm.
Abstract: Studies on two-photon lithography in negative SU-8 photoresist demonstrate the possibility of obtaining mechanically stable, stress-free, extended nanorods having lateral sizes of about 30 nm (corresponding to λ/25 resolution). The high resolution achievable with the given combination of materials and fabrication techniques demonstrates its potential for the fabrication of large-scale nanostructures, such as photonic crystals with photonic stop gaps at visible wavelengths.

281 citations

Journal ArticleDOI
TL;DR: In this paper, a spacer lithography process was developed to make a sub-40nm Si-fin structure for a double-gate FinFET with conventional dry etching for the first time.
Abstract: A spacer lithography process technology, which uses a sacrificial layer and spacer layer formed by chemical vapor deposition (CVD), has been developed. It has been applied to make a sub-40-nm Si-fin structure for a double-gate FinFET with conventional dry etching for the first time. The minimum-sized features are defined not by the photolithography but by the CVD film thickness. Therefore, this spacer lithography technology yields better critical dimension uniformity than conventional optical or e-beam lithography and defines smaller features beyond the limit of current lithography technology. It also provides a doubling of feature density for a given lithography pitch, which increases current by a factor of two. To demonstrate this spacer lithography technology, Si-fin structures have been patterned for planar double-gate CMOS FinFET devices.

266 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202227
20215
20207
201910
201814