A system is described for maintaining synchrony of operations among a plurality of devices having independent clocking arrangements. A task distribution device is to distribute tasks to a synchrony group comprising a plurality of devices to perform tasks distributed by the task distribution device in synchrony. The task distribution device distributes each task to synchrony group members over a network. Each task is associated with a time stamp that indicates a time, relative to a clock maintained by the task distribution device, at which synchrony group members are to execute the task. Each synchrony group member periodically obtains from the task distribution device an indication of current time indicated by its clock, determines a time differential between the task distribution device's clock and its respective clock and determines therefrom a time at which, according to its respective clock, the time stamp indicates that it is to execute the task.

System and method for synchronizing operations among a plurality of independently clocked digital data processing devices

A system for powering a network element of a fiber optic wide area network is disclosed. When communication data is transferred between a central office (CO) and a subscriber terminal using a network element to convert optical to electrical (O-E) and electrical to optical (E-O) signals between a fiber from the central office and twisted wire pair, coaxial cable or Ethernet cable transmission lines from the subscriber terminal, techniques related to local powering of a network element or drop site by the subscriber terminal or subscriber premise remote powering device are provided. Certain advantages and/or benefits are achieved using the present invention, such as freedom from any requirement for additional meter installations or meter connection charges and does not require a separate power network.

System and method for a subscriber-powered network element

An electronic message is analyzed for malware contained in the message. Text of an electronic message may be analyzed to detect and process malware content in the electronic message itself. The present technology may analyze an electronic message and attachments to electronic messages to detect a uniform resource location (URL), identify whether the URL is suspicious, and analyze all suspicious URLs to determine if they are malware. The analysis may include re-playing the suspicious URL in a virtual environment which simulates the intended computing device to receive the electronic message. If the re-played URL is determined to be malicious, the malicious URL is added to a black list which is updated throughout the computer system.

Electronic message analysis for malware detection

A dynamic signature creation and enforcement system can comprise a tap configured to copy network data from a communication network, and a controller coupled to the tap. The controller is configured to receive the copy of the network data from the tap, analyze the copy of the network data with a heuristic to determine if the network data is suspicious, flag the network data as suspicious based on the heuristic determination, simulate transmission of the network data to a destination device to identify unauthorized activity, generate an unauthorized activity signature based on the identification, and transmit the unauthorized activity signature to a digital device configured to enforce the unauthorized activity signature.

Dynamic signature creation and enforcement

A suspicious activity capture system can comprise a tap configured to copy network data from a communication network, and a controller coupled to the tap. The controller is coupled to the tap and is configured to receive the copy of the network data from the tap, analyze the copy of the network data with a heuristic to flag the network data as suspicious, and simulate transmission of the network data to a destination device.

Heuristic based capture with replay to virtual machine

Secure point to point network communications. Secure point to point network communications are accomplished by sending data across a secure link. Trusted partners at the link are matched to each other. To ensure that no un-trusted partners are on the link, authentication is performed. One of the points may be a secure tap. The secure tap authenticates a trusted partner by receiving a hardware embedded encryption key or value derived from the hardware embedded encryption key from the trusted partner. Data sent on the trusted link is encrypted to prevent interception of the data. The secure tap polices the link to ensure that no un-trusted are attached to the link and that the trusted partner is not removed from the link. If un-trusted partners are added to the link or trusted partners removed from the link, the secure tap ceases sending data.

Secure network access devices with data encryption

A bit error rate tester (100) for use in connection with a high speed networks. The bit error rate tester (100) includes transmit and receive ports (102, 104, 106 and 108), as well as a sequence generator (302), memory (112), synchronizer (322), sequence start detect module (326), and comparator (338). The sequence generator (302) generates a bit sequence for transmission through a network path. The bit sequence returns to the bit error rate tester (100) by way of the receive port (102, 104, 106 or 108). The synchronizer (322) then bit-aligns the received bit sequence to compensate for idles/fill words added/dropped as the bit sequence transited the network. The synchronized bit sequence is passed to the start word detector (326) which detects start and end words in the bit sequence and instructs the comparator (338) to compare only data between the start and end words. The comparator (338) compares the received bit sequence with a copy of the transmitted bit sequence regenerated from the memory (112), and calculates a bit error rate.

System and method for network error rate testing

Protocol analyzer systems enable synchronization of timestamps and the capture of data across serially chained boxes that are used together to monitor and capture network data. Through experiment, it can be determined how long it takes to propagate a signal to each box in the chain. These values are then recorded in each box in a delay register so that each box has a recorded delay value corresponding to the time required to propagate a signal to or receive a signal from every other box. Each box applies a control signal, such as a run signal or a trigger signal, to the ports in the box only after the expiration of the delay value indicated in the delay register. The box initiating the signal has the largest delay since the other boxes need to get the signal before the boxes can begin to operate with a common counter, with successive boxes having smaller delays.

Synchronization of timestamps to compensate for communication latency between devices

An optical signal return path system includes a transmitter (200) having a sample clock generator (212) for generating a sample clock (213) and an RF signal receiver (202-1) for receiving and converting an analog RF data signal into a first data stream of digitized RF data samples (Data-1) at a rate determined by the sample clock. Supplemental channel circuitry (202-2) provides a second data stream (Data-2). A multiplexor (204) receives and combines the first data stream (Data-1) and second data stream (Data-2), and an optical transmitter (206) converts the combined data stream into a serialized optical data signal for transmission over an optical fiber (210). The second data stream may contain maintenance data reflecting an operational state of the transmitter.

System and method for transmitting data on return path of a cable television system

The CATV digital return link system includes return path transmitters, intermediate hubs and a headend hub coupled to each other via a network of fiber optics cables. A pair of data-in multiplexors (221-1, 221-2) process the latched data from latches (220-1, 220-2), the 16-bit data words from the data-in multiplexors (221-1, 221-2) are then forwarded to a pair of data memory devices (223-1, 223-2). A control logic circuit (227) of the signal processing logic (204) is configured to generate read and write addresses for the various memory devices. The control logic circuit (227) and multiplexor (231) are configured to monitor a fullness level of the RF data memory device (223-1) and maintenance data memory (229).

Arthur Michael Lawson

Papers

Secure network access devices with data encryption

System and method for network error rate testing

Synchronization of timestamps to compensate for communication latency between devices

System and method for transmitting data on return path of a cable television system

Cable television return link system with high data-rate side-band communication channels