Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin-Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

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Neuromorphic Silicon Neuron Circuits

In the paper, an analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations. Several pro blems are addressed which are associated with the utiliza tion of these elements in linear applications, particularly in frequency filters. A methodology is proposed which generates a number of fundamentally new active elem ents with their potential utilization in various areas o f signal processing.

Active Elements for Analog Signal Processing: Classification, Review, and New Proposals

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

Conventional neuro-computing architectures and artificial neural networks have often been developed with no or loose connections to neuroscience. As a consequence, they have largely ignored key features of biological neural processing systems, such as their extremely low-power consumption features or their ability to carry out robust and efficient computation using massively parallel arrays of limited precision, highly variable, and unreliable components. Recent developments in nano-technologies are making available extremely compact and low power, but also variable and unreliable solid-state devices that can potentially extend the offerings of availing CMOS technologies. In particular, memristors are regarded as a promising solution for modeling key features of biological synapses due to their nanoscale dimensions, their capacity to store multiple bits of information per element and the low energy required to write distinct states. In this paper, we first review the neuro- and neuromorphic computing approaches that can best exploit the properties of memristor and scale devices, and then propose a novel hybrid memristor-CMOS neuromorphic circuit which represents a radical departure from conventional neuro-computing approaches, as it uses memristors to directly emulate the biophysics and temporal dynamics of real synapses. We point out the differences between the use of memristors in conventional neuro-computing architectures and the hybrid memristor-CMOS circuit proposed, and argue how this circuit represents an ideal building block for implementing brain-inspired probabilistic computing paradigms that are robust to variability and fault tolerant by design.

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Integration of nanoscale memristor synapses in neuromorphic computing architectures

A novel high speed CMOS integrated current comparator structure is presented which uses a source-follower input stage and a CMOS inverter as a positive feedback. It exhibits short propagation delay and occupies a small chip area.

Novel approach to high speed CMOS current comparators

* Chapter 1: Introduction * Chapter 2: Current-mode Circuits From A Translinear Viewpoint: A Tutorial * Chapter 3: Current Conveyor Theory And Practice * Chapter 4: Universal Current-Mode Analogue Amplifiers * Chapter 5: High Frequency CMOS Transconductors * Chapter 6: Bipolar Current Mirrors * Chapter 7: Dynamic Current Mirrors * Chapter 8: Gallium Arsenide Analogue Integrated Circuit Design Techniques * Chapter 9: Continuous-Time Filters * Chapter 10: Continuous-time and Switched Capacitor Monolithic Filters Based on LCR Filter Simulation using Current and Charge Variables * Chapter 11: Switched-Current Filters * Chapter 12: Analog Interface Circuits For VLSI * Chapter 13: Current Mode A/D and D/A Converters * Chapter 14: Applications of current-copier circuits * Chapter 15: Integrated Current Conveyor * Chapter 16: Applying 'Current Feedback' to Voltage Amplifiers * Chapter 17: Neural Network Building Blocks for Analog MOS VLSI * Chapter 18: Future of Analogue Integrated Circuit Design

Analogue IC design : the current-mode approach

More mature device technologies such as true complementary silicon bipolar junction (BJT), mixed silicon bipolar and complimentary metal oxide semiconductor devices (BiCMOS) and Gallium Arsenide (GaAs) are becoming available and bring with them the requirement for novel analogue design, methods, techniques and CAD tools necessary for the successful development and exploitation of these technologies for the future market place. Coupled with these technological improvements are the ever shrinking feature size of devices on ICs and the consequential reduction of power supply voltages which has fuelled the creation of 'alternative' analogue design methods. This paper is a review of some of the authors' work on the design and application of current-mode analogue signal processing techniques and the development of a new generation of high performance analogue circuit and system architectures, with emphasis on high speed.<
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D. G. Haigh

Papers

Analogue IC design : the current-mode approach

Towards a new generation of analogue IC design architectures