High-level synthesis systems start with an abstract behavioral specification of a digital system and find a register-transfer level structure that realizes the given behavior. The various tasks involved in developing a register-transfer level structure from an algorithmic level specification are described. In particular, it is shown how the high-level synthesis task can be decomposed into a number of distinct but not independent subtasks. The techniques that have been developed for solving those subtasks are presented. Areas related to high-level synthesis that are still open problems are examined. >

The high-level synthesis of digital systems

Hardware/software codesign investigates the concurrent design of hardware and software components of complex electronic systems. It tries to exploit the synergy of hardware and software with the goal to optimize and/or satisfy design constraints such as cost, performance, and power of the final product. At the same time, it targets to reduce the time-to-market frame considerably. This paper presents major achievements of two decades of research on methods and tools for hardware/software codesign by starting with a historical survey of its roots, by highlighting its major research directions and achievements until today, and finally, by predicting in which direction research in codesign might evolve in the decades to come.

Hardware/Software Codesign: The Past, the Present, and Predicting the Future

With ever-increasing system complexities, all major semiconductor roadmaps have identified the need for moving to higher levels of abstraction in order to increase productivity in electronic system design. Most recently, many approaches and tools that claim to realize and support a design process at the so-called electronic system level (ESL) have emerged. However, faced with the vast complexity challenges, in most cases at best, only partial solutions are available. In this paper, we develop and propose a novel classification for ESL synthesis tools, and we will present six different academic approaches in this context. Based on these observations, we can identify such common principles and needs as they are leading toward and are ultimately required for a true ESL synthesis solution, covering the whole design process from specification to implementation for complete systems across hardware and software boundaries.

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Electronic System-Level Synthesis Methodologies

This article presents a taxonomy for ESL tools and methodologies that combines UC Berkeley's platform-based design terminologies with Dan Gajski's Y-chart work. This is timely and necessary because in the ESL world we seem to be building tools without first establishing an appropriate design flow or methodology, thereby creating a lot of confusion. This taxonomy can help stem the tide of confusion

A Platform-Based Taxonomy for ESL Design

High-level synthesis (HLS) is an increasingly popular approach in electronic design automation (EDA) that raises the abstraction level for designing digital circuits. With the increasing complexity of embedded systems, these tools are particularly relevant in embedded systems design. In this paper, we present our evaluation of a broad selection of recent HLS tools in terms of capabilities, usability and quality of results. Even though HLS tools are still lacking some maturity, they are constantly improving and the industry is now starting to adopt them into their design flows.

https://www.cin.ufpe.br/~mel/pub/prototipac%E3o/referencias/HLS/art%253A10.1007%252Fs10617-012-9096-8_hls.pdf

An overview of today's high-level synthesis tools

This special issue is about the methodologies and tools that may help us solve the VLSI design crisis of the 1980s. Basically, there are three approaches. The first school of thought believes that all design decisions should be made solely by the human designer, who has gained experience through good design practices in the last 10 or 20 years. This approach, called computeraided design, gives the designer an "efficient paper and pencil" by providing graphic editors, design verification and simulation tools, and efficient databases. This approach is evolutionary and tends to be bottom up, since building blocks are first designed and then later used to realize higher level structures. The resulting design is of high quality, since humans are very good in optimizing designs. On the other hand, the human designer is slow and error-prone. Furthermore, creative designers optimize design by creating new design rules, thereby creating a demand for new verification tools and design description languages for documentation and communication between designers. After a bried review of the three approaches, the collection of articles presented, depicting all three approaches to VLSI design tools (each representing a different methodology in VLSI design), are briefly summarized.

Kuhn

Papers

Guest Editors' Introduction: New VLSI Tools