This paper describes the design of a low power, energy-efficient CMOS smart temperature sensor intended for RFID temperature sensing. The BJT-based sensor employs an energy- efficient 2nd-order zoom ADC, which combines a coarse 5-bit SAR conversion with a fine 10-bit ΔΣ conversion. Moreover, a new integration scheme is proposed that halves the conversion time, while requiring no extra supply current. To meet the stringent cost constraints on RFID tags, a fast voltage calibration technique is used, which can be carried out in only 200 msec. After batch calibration and an individual room-temperature calibration, the sensor achieves an inaccuracy of ±0.15°C (3σ) from -55°C to 125°C . Over the same range, devices from a second lot achieved an inaccuracy of ±0.25°C (3σ) in both ceramic and plastic packages. The sensor occupies 0.08 mm2 in a 0.16 μm CMOS process, draws 3.4 μA from a 1.5 V to 2 V supply, and achieves a resolution of 20 mK in a conversion time of 5.3 msec. This corresponds to a minimum energy dissipation of 27 nJ per conversion.

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A CMOS Temperature Sensor With a Voltage-Calibrated Inaccuracy of $\pm$ 0.15 $ ^{\circ}$ C (3 $\sigma$ ) From $-$ 55 $^{\circ}$ C to 125 $^{\circ}$ C

This paper describes an energy-efficient CMOS temperature sensor intended for use in RFID tags. The sensor achieves an inaccuracy of ±0.15°C (3σ) over the military temperature range (−55 to 125°C) and dissipates only 27nJ/conversion: over 20× less than a previous sensor with comparable accuracy and resolution [2]. This energy efficiency is achieved by the use of an improved charge-balancing scheme and a zoom ADC that combines a 5b coarse SAR conversion with a 10b fine 2nd-order ΔΣ conversion.

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A CMOS temperature sensor with a voltage-calibrated inaccuracy of ±0.15°C (3σ) from −55 to 125°C

The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for every new design. Analog-to-Digital Conversion discusses the different analog-to-digital conversion principles: sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation. Analog-to-Digital Conversion presents an overview of the state-of-the-art in this field and focuses on issues of optimizing accuracy and speed while reducing the power level. A lot of background knowledge and practical tips complement the discussion of basic principles, which makes Analog-to-Digital Conversion also a reference for the experienced engineer.

Analog-to-Digital Conversion

This paper describes a temperature sensor realized in a 65nm CMOS process with a batch-calibrated inaccuracy of ±0.5°C (3s) and a trimmed inaccuracy of ±0.2°C (3s) from −70°C to 125°C. This represents a 10-fold improvement in accuracy compared to other deep-submicron temperature sensors [1,2], and is comparable with that of state-of-the-art sensors implemented in larger-feature-size processes [3,4]. The sensor draws 8.3µA from a 1.2V supply and occupies an area of 0.1mm2, which is 45 times less than that of sensors with comparable accuracy [3,4]. These advances are enabled by the use of NPN transistors as sensing elements, the use of dynamic techniques i.e. correlated double sampling (CDS) and dynamic element matching (DEM), and a single room-temperature trim.

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A 1.2V 10µW NPN-based temperature sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3s) from −70°C to 125°C

This paper describes the design of a CMOS smart temperature sensor intended for RFID applications. The PNP-based sensor uses a digitally-assisted readout scheme that reduces the complexity and area of the analog circuitry and simplifies trimming. A key feature of this scheme is an energy-efficient two-step zoom ADC that combines a coarse 5-bit SAR conversion with a fine 10-bit ΣΔ conversion. After a single trim at 30°C, the sensor achieves an inaccuracy of ±0.2°C (3σ) from -30°C to 125°C. It also achieves a resolution of 15 mK at a conversion rate of 10 Hz. The sensor occupies only 0.12 mm2 in a 0.16 μm CMOS process, and draws 4.6 μA from a 1.6 V to 2 V supply. This corresponds to a minimum power dissipation of 7.4 μW, the lowest ever reported for a precision temperature sensor.

A 0.12 mm $^{2}$ 7.4 $\mu$ W Micropower Temperature Sensor With an Inaccuracy of $\pm$ 0.2 $^{\circ}$ C (3 $\sigma$ ) From $-$ 30 $^{\circ}$ C to 125 $^{\circ}$ C

Acknowledgment. 1. INTRODUCTION. 1.1 Motivation and Objectives. 1.2 Basic Principles. 1.3 Context of the Research. 1.4 Challenges. 1.5 Organization of the Book. References. 2. CHARACTERISTICS OF BIPOLAR TRANSISTORS. 2.1 Introduction. 2.2 Bipolar Transistor Physics. 2.3 Temperature Characteristics of Bipolar Transistors. 2.4 Bipolar Transistors in Standard CMOS Technology. 2.5 Processing Spread. 2.6 Sensitivity to Mechanical Stress. 2.7 Effect of Series Resistances and Base-Width Modulation. 2.8 Effect of Variations in the Bias Current. 2.9 Conclusions. References. 3. RATIOMETRIC TEMPERATURE MEASUREMENT USING BIPOLAR TRANSISTORS. 3.1 Introduction. 3.2 Generating an Accurate Current-Density Ratio. 3.3 Generating an Accurate Bias Current. 3.4 Trimming. 3.5 Curvature Correction. 3.6 Compensation for Finite Current-Gain. 3.7 Series-Resistance Compensation. 3.8 Conclusions. References. 4. SIGMA-DELTA ANALOG-TO-DIGITAL CONVERSION. 4.1 Introduction. 4.2 Operating Principles of Sigma-Delta ADCs. 4.3 First-Order Sigma-Delta Modulators. 4.4 Second-Order Sigma-Delta Modulators. 4.5 Decimation Filters. 4.6 Filtering of Dynamic Error Signals. 4.7 Conclusions. References. 5. PRECISION CIRCUIT TECHNIQUES. 5.1 Introduction. 5.2 Continuous-Time Circuitry. 5.3 Switched-Capacitor Circuitry. 5.4 Advanced Offset Cancellation Techniques. 5.5 Conclusions. References. 6. CALIBRATION TECHNIQUES. 6.1 Introduction. 6.2 Conventional Calibration Techniques. 6.3 Batch Calibration. 6.4 Calibration based on DVBE Measurement. 6.5 Voltage Reference Calibration. 6.6 Conclusions. References. 7. REALIZATIONS. 7.1 A Batch-Calibrated CMOS Smart Temperature Sensor. 7.2 A CMOS Smart Temperature Sensor with a 3s Inaccuracy of +-0.5 C from -50 C to 120 C. 7.3 A CMOS Smart Temperature Sensor with a 3s Inaccuracy of +-0.1 C from -55 C to 125 C. 7.4 Benchmark. References. 8. CONCLUSIONS. 8.1 Main Findings. 8.2 Other Applications of this Work. 8.3 Future Work. References. Appendices. A Derivation of Mismatch-Related Errors. A.1 Errors in DVBE B Resolution Limits of Sigma-Delta Modulators with a DC Input. B.1 First-Order Modulator. B.2 Second-Order Single-Loop Modulator. References. C Non-Exponential Settling Transients. C.1 Problem Description. C.2 Settling Transients from VBE1 ' 0 to VBE2 . C.3 Settling Transients from VBE1 = 0 to VBE2 . Summary. About the Authors. Index.

Micheal A. P. Pertijs

Papers

Precision Temperature Sensors in CMOS Technology

Precision Temperature Sensors in CMOS Technology (Analog Circuits and Signal Processing)