Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source.

A General Review of Multilevel Inverters Based on Main Submodules: Structural Point of View

This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$ -level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study.

Operation and Control of an Improved Hybrid Nine-Level Inverter

This paper proposes a novel single-dc-source multilevel inverter called Packed E-Cell (PEC) topology to achieve nine levels with noticeably reduced components count, while dc capacitors are actively balanced. The nine-level PEC (PEC9) is composed of seven active switches and two dc capacitors that are shunted by a four-quadrant switch to from the E-cell, and it makes use of a single dc link. With the proper design of the corresponding PEC9 switching states, the dc capacitors are balanced using the redundant charging/discharging states. Since the shunted capacitors are horizontally extended, both capacitors are simultaneously charged or discharged with the redundant states, so only the auxiliary dc-link voltage needs to be sensed and regulated to half of the input dc source voltage, and consequently, dc capacitors' voltages are inherently balanced to one quarter of the dc bus voltage. To this end, an active capacitor voltage balancing integrated to the level-shifted half-parabola carrier PWM technique has been designed based on the redundant charging/discharging states to regulate the dc capacitors voltages of PEC9. Furthermore, using the E-cell not only reduces components count but also the proposed topology permits multi ac terminal operation. Thus, five-level inverter operation can be achieved during the four-quadrant switch fault, which confers to the structure high reliability. The theoretical analysis as well as the experimental results are presented and discussed, showing the basic operation, multi-functionality, as well as the superior performance of the proposed novel PEC9 inverter topology.

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Packed E-Cell (PEC) converter topology operation and experimental validation

In this paper, a quasi-resonant switched-capacitor (QRSC) multilevel inverter (MLI) is proposed with self-voltage balancing for single-phase high-frequency ac (HFAC) microgrids. It is composed of a QRSC circuit (QRSCC) in the frontend and an H-bridge circuit in the backend. The input voltage is divided averagely by the series-connected capacitors in QRSCC, and any voltage level can be obtained by increasing the capacitor number. The different operational mechanism and the resulting different application make up for the deficiency of the existing switched-capacitor topologies. The capacitors are connected in parallel partially or wholly when discharging to the load, thus the self-voltage balancing is realized without any high-frequency balancing algorithm. In other words, the proposed QRSC MLI is especially adapted for HFAC fields, where fundamental frequency modulation is preferred when considering the switching frequency and the resulting loss. The quasi-resonance technique is utilized to suppress the current spikes that emerge from the instantaneous parallel connection of the series-connected capacitors and the input source, decreasing the capacitance, increasing their lifetimes, and reducing the electromagnetic interference, simultaneously. The circuit analysis, power loss analysis, and comparisons with typical switched-capacitor topologies are presented. To evaluate the superior performances, a nine-level prototype is designed and implemented in both simulation and experiment, whose results confirm the feasibility of the proposed QRSC MLI.

A Quasi-Resonant Switched-Capacitor Multilevel Inverter With Self-Voltage Balancing for Single-Phase High-Frequency AC Microgrids

In conventional hybrid multilevel inverters (MLIs), the voltage balance controls of floating capacitors are usually realized by redundant switching states using high-frequency modulation. The switching frequency, as well as the switching loss, is hence increased, and the topologies are limited to low-frequency output occasions as a result. In switched-capacitor MLIs (SCMLIs), the capacitors are self-balanced, since they are charged to fixed voltage levels by the input source directly or indirectly. By integrating switched-capacitor techniques into conventional hybrid MLIs, a pair of symmetric/asymmetric hybrid MLIs is proposed in this paper with boost ability. Complicated balance controls are avoided for capacitor voltages, and thus the modulation gets simplified. Compared with SCMLIs, the backend H-bridges that withstand the accumulated voltage stress are removed. The peak inverse voltages of devices are decreased, and thus only low-voltage components are needed. Meanwhile, the component numbers are reduced greatly. All these advantages contribute to high efficiency and reduced costs. Consequently, the proposed hybrid MLIs are especially appropriate for synthesizing a staircase output directly from an input source of low voltage. Analyses and their operational principles are firstly presented for the proposed topologies. Comparisons are then carried out to illustrate their superiority. To evaluate the performance, simulation and experimental prototypes are implemented, whose results confirm the feasibility of the proposed hybrid MLIs.

Symmetric/Asymmetric Hybrid Multilevel Inverters Integrating Switched-Capacitor Techniques

A multilevel inverter for generating 17 voltage levels using a three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors has been proposed. Various as- pects of the proposed inverter like capacitor voltage balancing have been presented in the present paper. Experimental results are presented to study the performance of the proposed converter. The stability of the capacitor balancing algorithm has been verified both during transients and steady-state operation. All the capac- itors in this circuit can be balanced instantaneously by using one of the pole voltage combinations. Another advantage of this topol- ogy is its ability to generate all the voltages from a single dc-link power supply which enables back-to-back operation of converter. Also, the proposed inverter can be operated at all load power fac- tors and modulation indices. Additional advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels. This configuration has very low dv/dt and common-mode voltage variation.

A. Meghana

Papers

Seventeen-Level Inverter Formed by Cascading Flying Capacitor and Floating Capacitor H-Bridges