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Abishek Seshan

Bio: Abishek Seshan is an academic researcher. The author has contributed to research in topics: Eigenface & Artificial intelligence. The author has an hindex of 1, co-authored 1 publications receiving 1 citations.

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TL;DR: A hybrid approach using a machine learning technique called eigenfaces, along with vanilla neural networks is discussed, which proved to be more promising and efficient than its counters.
Abstract: Coronavirus has become one of the most deadly pandemics in 2021. Starting in 2019, this virus is now a significant medical issue all over the world. It is spreading extensively because of its modes of transmission. The virus spreads directly, indirectly, or through close contact with infected people. It is proclaimed that people should wear a mask in public areas as a counteraction measure, as it helps in suppressing transmission. A portion of the spaces, where the virus has broadly fanned out, is because of inappropriate wearing of facial cover. In crowded areas, keeping a check on facial masks manually is difficult. To automate this process, an effective and robust face mask detector is required. This paper discusses a hybrid approach using a machine learning technique called eigenfaces, along with vanilla neural networks. The accuracy was compared for three different values of principal components. The test accuracy achieved was 0.87 for 64 components, 0.987 for 512 components, and 0.989 for 1,000 components. Hence, this approach proved to be more promising and efficient than its counters.

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TL;DR: A hybrid approach using a machine learning technique called eigenfaces, along with vanilla neural networks is discussed, which proved to be more promising and efficient than its counters.
Abstract: Received Apr 11, 2022 Revised Sep 16, 2022 Accepted Sep 30, 2022 Indigital circuits, energy reduction is the most important parameter in the design of handy and battery-operated devices. Flipflop is an important component in any digital system. By improving the performance of flip-flop, complete system performance is better. This paper addresses the design of D flip-flop using direct current diode-based positive feedback adiabatic logic (DC-DB PFAL) at various frequencies at 45nm technology node. Further, the layout for the proposed design is also presented. The performance analysis is carried out for delay, power dissipation, power delay product and transistor count. Circuit simulation is done by using cadence virtuoso tool at 10 MHz and 100 MHz frequencies. The results show an improvement in power dissipation of 18% with less transistors count compared to exiting designs in the literature.