An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area.

Nonvolatile Semiconductor Memory Device

Embodiments related to managing the process feed conditions for a semiconductor process module are provided. In one example, a gas channel plate for a semiconductor process module is provided. The example gas channel plate includes a heat exchange surface including a plurality of heat exchange structures separated from one another by intervening gaps. The example gas channel plate also includes a heat exchange fluid director plate support surface for supporting a heat exchange fluid director plate above the plurality of heat exchange structures so that at least a portion of the plurality of heat exchange structures are spaced from the heat exchange fluid director plate.

Process feed management for semiconductor substrate processing

An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

Switch Circuit and Method of Switching Radio Frequency Signals

A method of forming an insulation film by alternating multiple times, respectively, a process of adsorbing a precursor onto a substrate and a process of treating the adsorbed surface using reactant gas and a plasma, wherein a plasma is applied in the process of supplying the precursor.

Method of forming insulation film by modified PEALD

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which can achieve an increase of an operating speed and a low power consumption even when a measurement element for a monitor provided in the semiconductor integrated circuit device has a local variation. SOLUTION: A MOSFET 101A for the monitor is selected from a MOSFET group 102A by a measurement element select part 103A for the monitor in a monitor circuit 105A. Here, a value of a drain current at an arbitrary gate voltage value in a sub-threshold region or saturated region of each MOSFET of the MOSFET group 102A is measured as a measurement parameter, and the MOSFET in which a value of the drain current is a central value is selected as the MOSFET 101A for the monitor. Thereafter, a board voltage 108 of a board is adjusted by an operating parameter adjusting circuit 107 based on a drain current value 104A of the MOSFET 101A for the monitor selected by the monitor circuit 105A, and the board voltage 108 is supplied to an integrated circuit body 106A. COPYRIGHT: (C)2008,JPO&INPIT

Semiconductor integrated circuit device

PURPOSE: To improve performance at high speed by shortening the transient time of an operation by speedily turning off a Pochannel MOSFET (PchMOSFET), which holds a former state, by providing an N-channel MOSFET (NchMOSFE). CONSTITUTION: When changing the signal voltage of an input terminal 9 from L to H, the output of a low power supply voltage operated inverter 1 is changed from H to L. Next, NchMOSFET 5 and 13 are turned on by the output change of a low power supply voltage operated inverter 2, and the ON resistance of a PchMOSFET 7 is enlarged. Thus, the potential of a node 11 is pulled down by the FET 5. At the same time, the ON resistance of a PchMOSFET 8 is decreased, and the potential of a node 12 is increased. When the potential of the terminal 9 is completely turned to H, the FET 5 and 13 are turned on, NchMOSFET 6 and 14 are turned off, the FET 7 is turned off, the FET 8 is turned on, and the potential of a high power supply voltage operated circuit output terminal 10 is equalized with a high power supply voltage and stabilized. COPYRIGHT: (C)1995,JPO

Level shifter circuit

In a level shifter, in the case where the amplitude voltage of an input signal (i.e., a first power voltage VDDL) input to an input terminal is changed to be higher and the amplitude voltage of an output signal (i.e., a second power voltage VDDH) output from an output terminal is changed to be lower, a fall delay time of the signal output from the output terminal tends to be longer than a rise delay time of the signal. However, an inverted input signal obtained by an inverter is input to a level shifting unit and also to the gate of an N-type transistor, and therefore, the N-type transistor is turned on at the fall of the input signal input to the input terminal, so as to supply a current based on the second power voltage VDDH to an output node of the level shifting unit for assisting the shift into H level performed in the level shifting unit. Accordingly, even when at least one of the amplitude voltage of the input signal and the amplitude voltage of the output signal is changed, balance between the fall delay time characteristic and the rise delay time characteristic of the output signal can be satisfactorily kept.

Level shifter having automatic delay adjusting function

A dummy MOSFET including a dummy gate separates nMOSFETs included in adjacent memory cells arranged in the direction in which bit lines extend. This configuration reduces a stress applied from an STI to the channel regions of the nMOSFETs. Accordingly, decrease of drive currents of the nMOSFETs is suppressed.

Semiconductor memory and semiconductor integrated circuit

There is provided a flip flop circuit with a scan structure which is formed by an input section of a dynamic circuit and an output section of a static circuit wherein data is taken in within an interval of a short pulse width as compared with a clock cycle. In the dynamic circuit of the input section, the number of serially-connected MOS transistors to which a data signal is input is smaller than the number of serially-connected MOS transistors to which a test input signal is input. With this structure, the speed of operation is increased at the time of data storage for a data signal input, and the number of MOS transistors is reduced.

Akio Hirata

Papers

Semiconductor integrated circuit device

Level shifter circuit

Level shifter having automatic delay adjusting function

Semiconductor memory and semiconductor integrated circuit

Scan flip flop, semiconductor device, and production method of semiconductor device