We theoretically investigate the electronic transport properties of two closely spaced L-shaped semiconductor quantum wires, for different configurations of the output channel widths as well as the distance between the wires. Within the effective-mass approximation, we solve the time-dependent Schrodinger equation using the split-operator technique that allows us to calculate the transmission probability, the total probability current, the conductance, and the wave function scattering between the energy subbands. We determine the maximum distance between the quantum wires below which a relevant non-zero transmission is still found. The transmission probability and the conductance show a strong dependence on the width of the output channel for small distances between the wires.

Quantum tunneling between bent semiconductor nanowires

Multi-objective Design of Nanoscale Double Gate MOSFET Devices Using Surrogate Modeling and Global Optimization

Biaxial s-Si technology is perceived to be the alternate for the conventional MOS technology at the nanoscale. This is due to the enhanced performance of the biaxial s-Si technology. This chapter gives the review of biaxial s-Si technology. Some of the existing biaxial structures have been reviewed here. The main structures under biaxial category are relaxed SiGe, graded SiGe, SSOI, SGOI and other various hetero-structures help in providing improved performance. Some case studies of analytical modeling of carrier mobility and other relevant parameters are also given in this chapter.

Uniaxial s-Si Technology

The effects of multiple scattering on the electron transport properties in drain regions are numerically investigated for the cases of strained-Si diodes with or without scattering in the channel. The performance of non-ballistic (with scattering) channel Si-diodes is compared with that of ballistic (without scattering) channel Si-diodes, using the strain and scattering model. Our results show that the values of the electron velocity and the current in the strain model are higher than the respective values in the unstrained model, and the values of the velocity and the current in the ballistic channel model are higher than the respective values in the non-ballistic channel model. In the strain and scattering models, the effect of each carrier scattering mechanism on the performance of the Si-diodes is analyzed in the drain region. For the ballistic channel model, our results show that inter-valley optical phonon scattering improves device performance, whereas intra-valley acoustic phonon scattering degrades device performance. For the strain model, our results imply that the larger energy splitting of the strained Si could suppress the inter-valley phonon scattering rate. In conclusion, for the drain region, investigation of the strained-Si and scattering mechanisms are necessary, in order to improve the performance of nanoscale ballistic regime devices.

The effects of drain scatterings on the electron transport properties of strained-Si diodes with ballistic and non-ballistic channels

In this chapter, inversion layer quantization effects on carrier distribution in poly-Si gate, p-type, and n-type substrate are studied. The two approaches viz. triangular well and variation approach for inversion layer quantization are discussed. The capacitance and drain current are also modeled under the inversion layer quantization conditions.

Nanoscale Effects: Inversion Layer Quantization

This paper describes an analytical model for bulk electron mobility in strained-Si layers as a function of strain. Phonon scattering, columbic scattering and surface roughness scattering are included to analyze the full mobility model. Analytical explicit calculations of all of the parameters to accurately estimate the electron mobility have been made. The results predict an increase in the electron mobility with the application of biaxial strain as also predicted from the basic theory of strain physics of metal oxide semiconductor (MOS) devices. The results have also been compared with numerically reported results and show good agreement.

SPICE compatible analytical electron mobility model for biaxial strained-Si-MOSFETs

A model has been developed to study the effect of depletion and energy quantization at the poly-silicon/oxide interface on the behavior of a nanometer scale n-MOSFET. A model of inversion charge density, including the inversion layer quantization using the variation approach in the substrate, has also been produced. Using the exact calculations of the polygate potential under the depletion and quantization conditions, a C—V model has been developed. All the results have been compared with the numerical models reported in existing literature and they show good agreement.

Mathematical modeling of nanoscale MOS capacitance in the presence of depletion and energy quantization in a poly-silicon gate

At nanoscale dimensions (below 100nm) the behavioral characteristics of MOSFET change due to quantum mechanical effect and deviate from the normal equations. In this paper we have proposed a simple Graphical user interface model-NANO SIMULATOR . This simulator is based upon modified equations to predict the curves of nanoscale MOSFETs. It has been developed to study the Current-Voltage characteristics and the model parameters i.e. threshold voltage,flat band voltage, mobility of nanoscale MOSFETs specifically at 90nm, 65nm, 45nm,32nm technology nodes(or CMOS Process). This GUI based NANO SIMULATOR also helps in studying various types of leakage currents at 90nm, 65nm, 45nm, 32nm technology nodes.

Nanosimulator for Analysis of Mosfet at Nanoscale

This paper presents a comparative study of dual material double gate junctionless transistor with the single material double gate junctionless transistor. A review of the basic modelling of the Junctionless transistor is also given in the paper. The surface potential of both structures are compared. The threshold voltage compared for both the devices shows that the single material gate has higher threshold voltage.

Amit Chaudhry

Papers

SPICE compatible analytical electron mobility model for biaxial strained-Si-MOSFETs

Mathematical modeling of nanoscale MOS capacitance in the presence of depletion and energy quantization in a poly-silicon gate

Nanosimulator for Analysis of Mosfet at Nanoscale

A comparison of dual material double gate JLFET with single material double gate JLFET