https://repub.eur.nl/pub/104203/REPUB_104203-OA.pdf

2017 HRS / EHRA / ECAS / APHRS / SOLAECE expert consensus statement on catheter and surgical ablation of atrial fibrillation

2017 HRS expert consensus statement on cardiovascular implantable electronic device lead management and extraction

Augmented Reality (AR) is an emerging form of experience in which the Real World (RW) is enhanced by computer-generated content tied to specific locations and/or activities. Over the last several years, AR applications have become portable and widely available on mobile de- vices. AR is becoming visible in our audio-visual media (e.g., news, entertainment, sports) and is beginning to enter other aspects of our lives (e.g., e-commerce, travel, marketing) in tangible and exciting ways. Facilitating ubiquitous learning, AR will give learners instant access to location- specific information compiled and provided by numerous sources (2009). Both the 2010 and 2011 Horizon Reports predict that AR will soon see widespread use on US college campuses. In prepa- ration, this paper offers an overview of AR, examines recent AR developments, explores the impact of AR on society, and evaluates the implications of AR for learning and education.

/pdf/augmented-reality-an-overview-and-five-directions-for-ar-in-38pzuiakdt.pdf

Augmented Reality: An Overview and Five Directions for AR in Education

Aspects of the present invention relate to a compact optics module for a head mounted display including a DLP image source comprising a polarized light source providing illumination light, a flat reflective polarizer to reflect the illumination light toward the DLP image source and transmit image light, wherein the illumination light is provided at an angle to the DLP, a quarter wave retarder to change the polarization state of the illumination light as it is reflected by the DLP image source thereby providing image light, at least one light trap to absorb a portion of off-state image light, a lens element to provide a viewable field of view of on-state image light in an image displayed by the DLP image source, and a combiner to reflect the on-state image light toward a user's eye and provide a see-through view of a surrounding environment.

See-through computer display systems

In one embodiment of the invention, a method for controlling a robotic surgical tool is disclosed. The method for controlling a robotic surgical tool includes moving a monitor displaying an image of a robotic surgical tool; sensing motion of the monitor; and translating the sensed motion of the monitor into motion of the robotic surgical tool.

Controlling a robotic surgical tool with a display monitor

An eyepiece includes an eyepiece frame, an in-coupling polarization beam splitter (“PBS”), an end reflector, and an out-coupling PBS. The eyepiece frame defines an air cavity and includes an illumination region for receiving computer generated image (“CGI”) light into the eyepiece frame and a viewing region to be aligned with an eye of a user. The in-coupling PBS is supported within the eyepiece frame at the illumination region to re-direct the CGI light to a forward propagation path extending along the air cavity towards the viewing region. The end reflector is disposed to reflect the CGI light back along a reverse propagation path within the eyepiece frame. The out-coupling PBS is supported at the viewing region to pass the CGI light traveling along the forward propagation path and to redirect the CGI light traveling along the reverse propagation path out of an eye-ward side of the eyepiece frame.

Lightweight eyepiece for head mounted display

A method and apparatus determines interleaving schemes in a computer system that supports multiple interleaving schemes. In one embodiment, a memory interleaving scheme lookup table is used to assign memory interleaving schemes based on the number of available bank bits. In another embodiment, the percentage of concurrent memory operations is increased by assigning memory interleaving schemes to bank bits based on the classification of bank bits. The present invention supports a memory organization that provides separate memory busses that support independent simultaneous memory transactions, and memory bus segments that allow memory read operations to be overlapped with memory write operations, with each memory bus segment capable of carrying single memory operation at any given time. Bank bits that distinguish between memory busses are classified as class A, bank bits that distinguish between memory bus segments are classified as class B, and bank bits that distinguish between banks on a single memory bus segment are classified as class C. The memory controller supports multi-cache line interleaving (MCI), cache effect interleaving (CEI), and DRAM page interleaving (DPI). The memory operations associated with MCI tend to be independent, simultaneous, and unrelated. Therefore, class A bank bits are optimally allocated to MCI. The memory operations associated with CEI tend to occur in read/write pairs. Therefore, class B bank bits are optimally allocated to CEI. The memory operations associated with DPI tend to be serial in nature, and tend to be of the same type. Therefore, class C bank bits are optimally allocated DPI. In one embodiment, banks bits are assigned to memory interleaving schemes based on the classification of the bank bits using a memory interleaving scheme lookup table. In another embodiment, an algorithm is used to assign bank bits to interleaving schemes.

Method and apparatus for determining interleaving schemes in a computer system that supports multiple interleaving schemes

An address routing scheme supports a variety of memory sizes and interleaving schemes. In one embodiment, any address bit provided by the processor can be routed to any bank, row, or column bit, and can be used to generate any rank bit. This embodiment supports any type of interleaving scheme and memory modules constructed from a wide variety of DRAM chips. In another embodiment, a reduced routing function is used to generate rank bits and route address bits to subsets of bank, row, or column bits such that no route function encoding requires more than 3 bits. The second embodiment supports multi-cache line interleaving, cache effect interleaving, and DRAM page interleaving. Multi-cache line causes cache lines contained in small contiguous blocks to be contained in one DRAM page, while contiguous small contiguous blocks are stored on separate DRAM pages. Cache-effect interleaving greatly increases the probability that cache lines having the same index, but different tags, will be stored in different banks by routing one or more of the address bits corresponding with the bits immediately above the cache memory index field to either bank or rank bits. Finally, DRAM page interleaving causes contiguous (or proximate) DRAM pages to be stored in separate banks by routing one or more of the address bits corresponding with the bits immediately above the column boundary to either bank or rank bits.

Fast and compact address bit routing scheme that supports various DRAM bank sizes and multiple interleaving schemes

A light integrating system includes at least one total internal reflection (TIR) prism and a light integrating device disposed to collect and homogenize light exiting from the TIR prism.

Systems and methods for integrating light

An eyepiece for a head mounted display includes a display module, end reflector, and viewing region. The end reflector is disposed at an opposite end of the eyepiece from the display module to reflect the display light back from a forward propagation path to a reverse propagation path. The viewing region is disposed between the display module and the end reflector and includes a partially reflective surface, that passes the display light traveling along the forward propagation path and redirects the display light traveling along the reverse propagation path out of an eye-ward side of the eyepiece along an emission path. The partially reflective surface has a compound folding angle such that the emission path of the display light emitted from the eyepiece is folded along two axes relative to the reverse propagation path between the end reflector and the partially reflective surface.

Anurag Gupta

Papers

Lightweight eyepiece for head mounted display

Method and apparatus for determining interleaving schemes in a computer system that supports multiple interleaving schemes

Fast and compact address bit routing scheme that supports various DRAM bank sizes and multiple interleaving schemes

Systems and methods for integrating light

Optical beam tilt for offset head mounted display