Electromagnetics for High-Speed Analog and Digital Communication Circuits: Preface

Electromagnetics for High-Speed Analog and Digital Communication Circuits: Distributed circuits

In this review, biomedical-related wireless miniature devices such as implantable medical devices, neural prostheses, embedded neural systems, and body area network systems are investigated and categorized. The two main subsystems of such designs, the RF subsystem and the energy source subsystem, are studied in detail. Different application classes are considered separately, focusing on their specific data rate and size characteristics. Also, the energy consumption of state-of-the-art communication practices is compared to the energy that can be generated by current energy scavenging devices, highlighting gaps and opportunities. The RF subsystem is classified, and the suitable architecture for each category of applications is highlighted. Finally, a new figure of merit suitable for wireless biomedical applications is introduced to measure the performance of these devices and assist the designer in selecting the proper system for the required application. This figure of merit can effectively fill the gap of a much required method for comparing different techniques in simulation stage before a final design is chosen for implementation.

Feasibility of Energy-Autonomous Wireless Microsensors for Biomedical Applications: Powering and Communication

This paper proposes a low power ring oscillator by combining current starving technique with negative skewed delay approach. This design has shown an improvement of more than 50% in the power delay product compared to the state of the art techniques. Circuit simulations are carried out in standard 65 nm technology. The proposed circuit has shown a robust performance against temperature and voltage variation within 10%. Therefore this circuit can find potential applications in IoT devices and RFID tags operating from 10 MHz to 1 GHz.

Low power ring oscillator for IoT applications

This study presents an ultra-low-power, low-phase noise, and small-size voltage-controlled ring oscillator for use in implantable electronics operating in the Medical Implant Communication Service (MICS) frequency band and 65-nm IBM CMOS technology. This five-stage voltage-controlled ring oscillator does not require external inductor and capacitor similar to other LC oscillators, and hence, requires very small die area. A new methodology to design them has been employed in this study, and for optimizing the design of this voltage-controlled oscillator (VCO), the phase noise and power consumption of five-stage ring oscillators have been formulated and simulated for different sizes of transistors. The simulated phase noise of this VCO was -111 dBc/Hz at 1 MHz offset from a 400-MHz center frequency. The power consumption of VCO was 158 μW. This VCO has a tuning range from 352 to 454 MHz for tuning within the MICS band frequency, and frequency correction accounts for process supply voltage and temperature effects.

An ultra-low-power and low-noise voltage-controlled ring oscillator for biomedical applications

Low-power, low-phase noise and small size PLL is a critical component in wearable and implantable medical sensors. A new ultra-low power, low-phase noise and small size ring VCO on 65 nm IBM CMOS technology for use in PLL is introduced in this paper. This VCO operates in the Medical Implant Communication Service (MICS) frequency band. This ring oscillator VCO doesn't need external inductor and capacitor like other LC oscillators and so requires very small die area. This VCO has two voltage control points. First control point has a wide tuning range from 350 MHz to 450 MHz for the coarse tuning and frequency correction account for process supply voltage and temperature effects. This point has a KVCO and large tuning range but would have higher sensitivity and phase noise for fine tuning as part of a PLL. To decrease the phase noise in fine tuning, another control point is added. The second control point has a narrow tuning range from 399 MHz to 416 MHz for fine tuning within the MICS band frequency. The simulated phase noise of this VCO is −105 dBc/Hz at 1 MHz offset and −91 dBc/Hz at 300 kHz offset from a 400 MHz center frequency. The power consumption of the VCO is 196 micro watt.

An ultra low power and small size PLL for wearable and implantable medical sensors

The emerging biomedical applications urge ultra low power consumption and small size transceivers. In this paper traditional modulations schemes have been studied and compared to a novel modulation scheme called Saturated Analog Signal (SAS), which has been developed specifically for these new applications. This new modulation has been combined with a new design for the receiver in 65nm technology and resulted in a digital CMOS receiver with 10 µW power consumption. The receiver achieved a 500 Kb/s data rate, giving it a 20pJ/bit received consumption. This design uses a 1 V power supply while occupying an area of just 0.6 mm2 and is capable of being fully integrated on single chip solutions for ultra low power biomedical applications such as retinal prosthesis and embedded neural applications.

An ultra low power digital receiver architecture for biomedical applications

A new architecture for a non-continuous operation for frequency divider, frequency & phase detector and charge pump to design a low-power, low-phase noise and small size PLL for biomedical applications is introduced in this paper. This PLL operates in the Medical Implant Communication Service (MICS) frequency band and uses an ultra-low power ring VCO on 65nm CMOS technology. This ring oscillator VCO doesn't need external inductor and capacitor like other LC oscillators and so requires very small die area. This VCO has two voltage control points. First control point has a wide tuning range for the coarse tuning and the second control point has a narrow tuning range for fine tuning within the MICS band frequency. This PLL exhibiting performance exceeding that of previously published designs.

New architecture for an ultra low power and low noise PLL for biomedical applications

There is a high demand for research into innovation and development of miniaturized electronic devices for biomedical applications such as lab on a chip device, implantable medical devices (IMD), and wireless biosensor systems (WBS), etc. These electronic systems must be wireless as wires penetrating through human skin increase the risk of infections as they act as conduits for viruses and bacteria and they also limit the flexibility of movement for patients. Ultralow power transceivers are essential because wireless communication subsystems consume most of the power in wireless biomedical implants and implanted batteries are undesirable due to their limited lifespan and the risk of infection they pose. Also, a limited amount of power can be transferred through the wireless power link system. The design requirements for wireless communication and power source subsystems for wireless biomedical implants can be determined based on the specific application of the wireless biomedical implants. Practical limits and challenges in low power and low voltage design of wireless systems in lab-on-a-chip devices and implantable biomedical devices need to be considered for investigating various techniques for low power design with the advantages and the trade-offs of each design technique. This paper outlines the practical limits and challenges for powering wireless systems in implantable and lab-on-a-chip biomedical devices and reviews low power design techniques.

Practical Limits and Challenges for Powering of Wireless Systems in Implantable and Lab on a Chip Biomedical Devices and Review of the Low Power Design Techniques

B. Ghafari

Papers

An ultra low power and small size PLL for wearable and implantable medical sensors

An ultra-low-power and low-noise voltage-controlled ring oscillator for biomedical applications

An ultra low power digital receiver architecture for biomedical applications

New architecture for an ultra low power and low noise PLL for biomedical applications

Practical Limits and Challenges for Powering of Wireless Systems in Implantable and Lab on a Chip Biomedical Devices and Review of the Low Power Design Techniques