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Bernhard Scholz
Researcher at University of Sydney
Publications - 108
Citations - 2099
Bernhard Scholz is an academic researcher from University of Sydney. The author has contributed to research in topics: Compiler & Datalog. The author has an hindex of 22, co-authored 101 publications receiving 1653 citations. Previous affiliations of Bernhard Scholz include Information Technology University & Vienna University of Technology.
Papers
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Journal ArticleDOI
Provenance-guided synthesis of Datalog programs
TL;DR: The approach leverages query provenance to scale the counterexample-guided inductive synthesis (CEGIS) procedure for program synthesis and presents experimental results that demonstrate significant improvements over the state-of-the-art, including in synthesizing invented predicates, reducing running times, and in decreasing variances in synthesis performance.
Proceedings ArticleDOI
Symbolic evaluation for parallelizing compilers
Thomas Fahringer,Bernhard Scholz +1 more
TL;DR: Efficient symbolic evaluation techniques to compute the values of variables and symbolic expressions, and to determine the condition under which control flow reaches a program statement at compile time are described.
Proceedings ArticleDOI
Orchestration by approximation: mapping stream programs onto multicore architectures
TL;DR: It is shown experimentally that state-of-the art integer linear programming approaches for orchestrating stream graphs are intractable or at least impractical for larger stream graphs and larger number of processors and an efficient and effective 2-approximation algorithm is highly efficient and its results are close to the optimal solution for a standard set of StreamIt benchmark programs.
Book ChapterDOI
Nearly optimal register allocation with PBQP
Lang Hames,Bernhard Scholz +1 more
TL;DR: A new heuristic for PBQP is presented which significantly improves the quality of its register allocations and extends the range of viable target architectures and a new branch-and-bound technique is introduced that is able to find optimal register allocations.
Proceedings ArticleDOI
Register liveness analysis for optimizing dynamic binary translation
TL;DR: This work presents a dynamic liveness analysis algorithm that trades precision for fast execution and conducted experiments with the SpecInt95 benchmark suite using the authors' PowerPC to Alpha translator, which resulted in a speed-up of 10 to 30 percent depending on the target machine.