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Brian Van Essen

Researcher at Lawrence Livermore National Laboratory

Publications -  61
Citations -  2984

Brian Van Essen is an academic researcher from Lawrence Livermore National Laboratory. The author has contributed to research in topics: Deep learning & Computer science. The author has an hindex of 21, co-authored 55 publications receiving 1960 citations. Previous affiliations of Brian Van Essen include University of Washington & Association for Computing Machinery.

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Journal ArticleDOI

A State-of-the-Art Survey on Deep Learning Theory and Architectures

TL;DR: This survey presents a brief survey on the advances that have occurred in the area of Deep Learning (DL), starting with the Deep Neural Network and goes on to cover Convolutional Neural Network, Recurrent Neural Network (RNN), and Deep Reinforcement Learning (DRL).
Posted Content

The History Began from AlexNet: A Comprehensive Survey on Deep Learning Approaches.

TL;DR: This report presents a brief survey on development of DL approaches, including Deep Neural Network (DNN), Convolutional neural network (CNN), Recurrent Neural network (RNN) including Long Short Term Memory (LSTM) and Gated Recurrent Units (GRU), Auto-Encoder (AE), Deep Belief Network (DBN), Generative Adversarial Network (GAN), and Deep Reinforcement Learning (DRL).
Proceedings ArticleDOI

Communication quantization for data-parallel training of deep neural networks

TL;DR: This work port two existing quantization approaches, one-bit and threshold, and develop their own adaptive quantization algorithm, which is comparable or superior for large layers without sacrificing accuracy and achieves near-linear speedup in data-parallel training.
Proceedings ArticleDOI

Accelerating a Random Forest Classifier: Multi-Core, GP-GPU, or FPGA?

TL;DR: FPGAs provide the highest performance solution, but require a multi-chip / multi-board system to execute even modest sized forests, while GP-GPUs offer a more flexible solution with reasonably high performance that scales with forest size, and multi-threading via Open MP on a shared memory system was the simplest solution.
Proceedings ArticleDOI

SPR: an architecture-adaptive CGRA mapping tool

TL;DR: SPR as discussed by the authors is an architecture-adaptive mapping tool for use with Coarse-Grained Reconfigurable Architectures (CGRAs), which combines a VLIW style scheduler and FPGA style placement and pipelined routing algorithms with novel mechanisms for integrating and adapting the algorithms to CGRAs.