A parallel concatenated convolutional coding scheme consists of two constituent systematic: convolutional encoders linked by an interleaver. The information bits at the input of the first encoder are scrambled by the interleaver before entering the second encoder. The codewords of the parallel concatenated code consist of the information bits followed by the parity check bits of both encoders. Parallel concatenated codes (turbo codes), decoded through an iterative decoding algorithm of relatively low complexity, have been shown to yield remarkable coding gains close to theoretical limits. We characterize the separate contributions that the interleaver length and constituent codes give to the overall performance of the parallel concatenated code, and present some guidelines for the optimal design of the constituent convolutional codes.

Design of parallel concatenated convolutional codes

In this article, we present two versions of a simplified maximum a posteriori decoding algorithm. The algorithms work in a sliding window form, like the Viterbi algorithm, and can thus be used to decode continuously transmitted sequences obtained by parallel concatenated codes, without requiring code trellis termination. A heuristic explanation is also given of how to embed the maximum a posteriori algorithms into the iterative decoding of parallel concatenated codes (turbo codes). The performances of the two algorithms are compared on the basis of a powerful rate 1/3 parallel concatenated code. Basic circuits to implement the simplified a posteriori decoding algorithm using lookup tables, and two further approximations (linear and threshold), with a very small penalty, to eliminate the need for lookup tables are proposed.

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Soft-Output Decoding Algorithms in Iterative Decoding of Turbo Codes

The development of error-correcting codes has been closely coupled with deep-space exploration since the early days of both. Since the discovery of turbo codes in 1993, the research community has invested a great deal of work on modern iteratively decoded codes, and naturally NASA's Jet Propulsion Laboratory (JPL) has been very much involved. This paper describes the research, design, implementation, and standardization work that has taken place at JPL for both turbo and low-density parity-check (LDPC) codes. Turbo code development proceeded from theoretical analyses of polynomial selection, weight distributions imposed by interleaver designs, decoder error floors, and iterative decod- ing thresholds. A family of turbo codes was standardized and implemented and is currently in use by several spacecraft. JPL's LDPC codes are built from protographs and circulants, selected by analyses of decoding thresholds and methods to avoid loops in the code graph. LDPC encoders and decoders have been implemented in hardware for planned spacecraft, and standardization is under way.

The Development of Turbo and LDPC Codes for Deep-Space Applications Error-correcting codes that allow very power-efficient information transmission from spacecraft have been developed along with suitable encoding and decoding hardware.

We consider a turbo-coded system employed on a flat-fading channel where the transmitter and receiver adapt the encoder, decoder, modulation scheme, and transmit power to the state of the channel. Assuming instantaneous and error-free channel gain and phase knowledge at the transmitter and the receiver, we determine the optimal adaptation strategy that maximizes the throughput of this system, while achieving a given bit-error rate under an average power constraint. Our optimized adaptive modulation strategy is based on an extensive set of existing turbo-coded modulation schemes. We find that adapting both the turbo encoder (rate) and the transmit power can achieve performance within 3 dB of the fading channel capacity.

Adaptive turbo-coded modulation for flat-fading channels

The present invention is a turbo product code decoder capable of decoding multi-dimensional coding schemes. The decoder may be implemented in any digital communication system capable of receiving an encoded stream of data. The decoder is configured for receiving soft decision values. The decoder iteratively decodes the data by generating new soft difference values for each axis-iteration of decoding. These soft difference values represent the change in soft decision values after each axis-iteration. The soft difference values from each axis-iteration are then summed with the original soft decision values in decoding each of the other axis. After any full iteration -- i.e. after all axis dimensions have been decoded one full time, the previous difference values for any axis are discarded when that axis is decoded in subsequent iterations. Accordingly, the same information is not continuously fed into the decoder during each subsequent iteration, thereby decreasing the likelihood of error and offering an improvement over prior decoders. Moreover, using unique nearest neighbor computation logic, the decoder of the present invention is able to generate valid nearest neighbors more efficiently without requiring the use of a look-up table, thereby reducing the amount of time required to decode. Finally, the decoder of the present invention utilizes four decoders arranged in parallel along with a unique memory array accessing scheme such that multiple rows or columns may be decoded at the same time, thereby increasing the data throughput time of the decoder over prior turbo product code decoders.

Turbo product code decoder

The performance of the turbo code is sensitive to its code structure, which is made up of code rate, constraint length, tap connection, block size, interleaving pattern and number of decoding iterations. In this paper, mitigation techniques that can lower the error floor are adopted in both encoder and decoder. Optimum tap connections are listed for codes with constraint lengths 3, 4, and 5. Performance variations achieved by changing different parameters are investigated. Simulation results show that (1) using 10 decoding iterations is adequate; (2) the S-random interleaving provides the best performance among the interleavers investigated; (3) using codes with constraint lengths greater than 3 does not buy any additional coding gain for short block size (in the vicinity of 100); (4) for block size greater than 500, no significant improvement is noticed by increasing the constraint length from 4 to 5 in the range of bit error rate (BER) <10/sup -6/; and (5) the punctured rate 1/2 code structure degrades the performance by only 0.5 to 0.7 dB in comparison with the classic rate 1/3 turbo code for constraint lengths 3, 4, and 5.

C.C. Wang

Papers

On the performance of turbo codes