A communication network having a first broadband communications channel or transmitting bus and a second broadband communications channel or receiving bus, wherein the first broadband communications channel is for passing information upstream to a head end and the second broadband communications channel is for passing information downstream from the head end to remote nodes. All nodes of the system are coupled to both the first communications channel and the second communications channel. According to the invention, modulation of signals applied to the first communication channel is optimized for burst communication from a plurality of sources to central control at the head end, and modulation applied to the second communications channel is optimized for continuous communication from the central source to a target node.

Modulation and demodulation system employing AM-PSK and FSK for communication system using digital signals

The ratio of peak power level to average power level (500) in a power amplifier used in a QAM communication system transmitter (100) can be reduced by preselecting magnitudes and phase angles of complex-valued pilot symbols (103-106) used in multi-channel (111-116), N-level QAM.

Peak to average power ratio reduction methodology for qam communications systems

A demodulator for OQPSK signals modulated with two unique words resolves eight possible cominbations of phase ambiguity which may product data error by first processing received I R and Q R data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the unique words to not only reverse the received I R and Q R data channels, but to also invert (complement) the I R and/or Q R data, or to at least complement the I R and Q R data for systems using nontransparent codes that do not have rotation direction ambiguity.

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Phase ambiguity resolution for offset QPSK modulation systems

An unbalanced quarternary phase-shift keying modulator provides relatively higher signal power for one of two signal information channels. The carrier to be modulated is split into two equal-amplitude, equal-phase portions, each of which is applied to a biphase modulator. Each of the information signals is also applied to one of the biphase modulators, for producing two equal-amplitude, phase modulated carriers, each biphase modulated by one of the information signals. The modulated carriers are applied to the ports of a quadrature hybrid coupler which is other than a 3 dB (equal-amplitude) coupler. In one embodiment, the coupler is a 7 dB coupler. The modulated carrier applied to the through port of the coupler appears with reference amplitude and phase at the output of the hybrid. The modulated carrier applied to the other or coupled port appears at the output with relatively reduced amplitude and a relative phase shift. In one embodiment, the phase shift is 90°. The resulting sum signal is quarternary keyed by the information signals. Waveguide and microstrip unbalanced couplers are described.

Unbalanced quarternary PSK modulator using unbalanced quadrature coupler

An autocalibrating modulating array transmitter 10 and autocalibration method 30 . The autocalibrating modulating array transmitter is used to gain-balance and phase-balance parallel amplifier stages 11 for coherent combining. The novelty of the autocalibration technique involves periodic substitution of calibration symbols into a valid data stream, the use of only the error magnitude (as opposed to magnitude and phase), and a random selection of either gain or phase adjustments to avoid limit cycles.

Modulating array transmitter autocalibration method and system

A coder-decoder device for OQPSK signals with four phase states comprises a coder for converting a binary signal bit stream T n into two digital bit streams X n and Y n and a decoder for restoring the digital bit stream T n from the digital bit streams X n and Y n applied to its inputs. The coder comprises a first logic circuit for assigning to each bit of the bit stream X n the binary value 1 or 0 in accordance with the logic equation X.sub.n =(T.sub.n *+H.sub.n /2)*⊕X.sub.n-1 where H n /2 designates synchronization pulses in phase with the bits of the bit stream T n . A second logic circuit assigns to each bit of the bit stream Y n the binary value 1 or 0 in accordance with the logic equation Y.sub.n =T.sub.n ⊕X.sub.n ⊕X.sub.n-1 ⊕Y.sub.n-1. The decoder comprises a third logic circuit which assigns to each bit of the restored bit stream T n the binary value in accordance with the following logic equation: T.sub.n =X.sub.n ⊕X.sub.n-1 ⊕Y.sub.n ⊕Y.sub.n-1.

Device for coding-decoding a binary digital signal bit stream for an "OQPSK" digital modulator-demodulator with four phase states

LE DISPOSITIF DE CODAGE-DECODAGE DE SIGNAUX OQPSK A QUATRE ETATS DE PHASE SELON L'INVENTION COMPREND UN CODEUR POUR TRANSFORMER UN TRAIN NUMERIQUE (T) DE SIGNAUX BINAIRES EN DEUX TRAINS NUMERIQUES (X ET Y), ET UN DECODEUR PERMETTANT DE RESTITUER LE TRAIN NUMERIQUE T A PARTIR DES TRAINS NUMERIQUES (X ET Y) APPLIQUES A SES ENTREES LE CODEUR COMPREND UN PREMIER CIRCUIT LOGIQUE 3 POUR ATTRIBUER A CHAQUE BIT X DU TRAIN (X) LA MEME VALEUR

Camand Michel

Papers

Device for coding-decoding a binary digital signal bit stream for an "OQPSK" digital modulator-demodulator with four phase states

Dispositif de codage-decodage d'un train de signaux numeriques binaires pour modulateur-demodulateur numerique " oqpsk " a quatre etats de phase