C
Charles B. Silio
Researcher at University of Maryland, College Park
Publications - 18
Citations - 122
Charles B. Silio is an academic researcher from University of Maryland, College Park. The author has contributed to research in topics: Enterprise system & Service provider. The author has an hindex of 8, co-authored 18 publications receiving 118 citations.
Papers
More filters
Journal ArticleDOI
System of Systems for Quality-of-Service Observation and Response in Cloud Computing Environments
TL;DR: This paper presents a SoS approach to enable QoS monitoring, management, and response for enterprise systems that deliver computing as a service through a cloud computing environment and demonstrates the efficacy of this approach.
Proceedings ArticleDOI
Procedure for detection of and response to Distributed Denial of Service cyber attacks on complex enterprise systems
Paul C. Hershey,Charles B. Silio +1 more
TL;DR: This paper presents a detailed procedure for identifying both the on-set of DDoS attacks and corresponding countermeasures to prevent or limit their effects and applies a hybrid approach that adapts to changing DDoS attack scenarios.
Proceedings ArticleDOI
System of Systems to provide Quality of Service monitoring, management and response in cloud computing environments
TL;DR: This paper presents a SoS approach to provide QoS monitoring, management, and response for enterprise systems that delivers computing as a service through a cloud computing environment and simulated results demonstrate the effectiveness of the approach.
Proceedings ArticleDOI
Systems engineering approach for event monitoring and analysis in high speed enterprise communications systems
Paul C. Hershey,Charles B. Silio +1 more
TL;DR: This paper presents graphical representations of various aspects of the monitoring and analysis approach that include architectural, operational, systems-level, and technical views that enable solution of system-wide problems.
Proceedings ArticleDOI
Some I2L circuits for multiple-valued logic
TL;DR: I 2 L circuits for the various gate types and design approaches that have been proposed, including some memory elements, are suggested, and some of the problems of using I 2 L multiple-valued logic chips in practical designs are discussed.