Etch characteristics of KOH, TMAH and dual doped TMAH for bulk micromachining of silicon

We present the microfabrication of silicon nitride membrane supports ('windows') for transmission electron microscopy (TEM) and illustrate their usefulness for direct preparation and studies of nanostructures. These membrane 'windows' enable TEM to be incorporated as an affordable diagnostic tool in nanostructure fabrication and applications thereof, in an iterative fashion, both during and after preparation as well as subsequent experimental steps with the nanostructures, and even for real time in situ TEM observations. Several examples are shown, including protein adsorption and nanofabrication for applications in heterogeneous catalysis.

http://iopscience.iop.org/article/10.1088/0957-4484/15/9/012/pdf

Transmission electron microscopy 'windows' for nanofabricated structures

Wet anisotropic etching based silicon micromachining is an important technique to fabricate freestanding (e.g. cantilever) and fixed (e.g. cavity) structures on different orientation silicon wafers for various applications in microelectromechanical systems (MEMS). {111} planes are the slowest etch rate plane in all kinds of anisotropic etchants and therefore, a prolonged etching always leads to the appearance of {111} facets at the sidewalls of the fabricated structures. In wet anisotropic etching, undercutting occurs at the extruded corners and the curved edges of the mask patterns on the wafer surface. The rate of undercutting depends upon the type of etchant and the shape of mask edges and corners. Furthermore, the undercutting takes place at the straight edges if they do not contain {111} planes. {100} and {110} silicon wafers are most widely used in MEMS as well as microelectronics fabrication. This paper reviews the fabrication techniques of convex corner on {100} and {110} silicon wafers using anisotropic wet chemical etching. Fabrication methods are classified mainly into two major categories: corner compensation method and two-steps etching technique. In corner compensation method, extra mask pattern is added at the corner. Due to extra geometry, etching is delayed at the convex corner and hence the technique relies on time delayed etching. The shape and size of the compensating design strongly depends on the type of etchant, etching depth and the orientation of wafer surface. In this paper, various kinds of compensating designs published so far are discussed. Two-step etching method is employed for the fabrication of perfect convex corners. Since the perfectly sharp convex corner is formed by the intersection of {111} planes, each step of etching defines one of the facets of convex corners. In this method, two different ways are employed to perform the etching process and therefore can be subdivided into two parts. In one case, lithography step is performed after the first step of etching, while in the second case, all lithography steps are carried out before the etching process, but local oxidation of silicon (LOCOS) process is done after the first step of etching. The pros and cons of all techniques are discussed.

/pdf/a-comprehensive-review-on-convex-and-concave-corners-in-5f1mlgjztz.pdf

A comprehensive review on convex and concave corners in silicon bulk micromachining based on anisotropic wet chemical etching

Co-integration of sensors with their associated electronics on a single silicon chip may provide many significant benefits regarding performance, reliability, miniaturization and process simplicity without significantly increasing the total cost. Micromachined Thin-Film Sensors for SOI-CMOS Co-integration covers the challenges and interests and demonstrates the successful co-integration of gas-flow sensors on dielectric membrane, with their associated electronics, in CMOS-SOI technology. We firstly investigate the extraction of residual stress in thin layers and in their stacking and the release, in post-processing, of a 1 µm-thick robust and flat dielectric multilayered membrane using Tetramethyl Ammonium Hydroxide (TMAH) silicon micromachining solution. The optimization of its selectivity towards aluminum is largely demonstrated. The second part focuses on sensors design and characteristics. A novel loop-shape polysilicon microheater is designed and built in a CMOS-SOI standard process. High thermal uniformity, low power consumption and high working temperature are confirmed by extensive measurements. The additional gas flow sensing layers are judiciously chosen and implemented. Measurements in the presence of a nitrogen flow and gas reveal fair sensitivity on a large flow velocity range as well as good response to many gases. Finally, MOS transistors suspended on released dielectric membranes are presented and fully characterized as a concluding demonstrator of the co-integration in SOI technology.

/pdf/micromachined-thin-film-sensors-for-soi-cmos-co-integration-50zwn0s71m.pdf

Micromachined thin-film sensors for SOI-CMOS co-integration

http://esl.ecsdl.org/content/8/6/G147.full.pdf

Silicon Multilayer Stacking Based on Copper Wafer Bonding

The present study aims at obtaining the etching rate of Si(1 0 0) surfaces as well as the silicon oxide layer when the surfaces are exposed to tetramethylammonium hydroxide (TMAH) water solution. The influence of TMAH solution concentration and solution temperature on the etching rate is also studied. In this work, the value of TMAH concentration ( C TMAH ) ranges from 2 to 25 wt.% and the etching temperature ranges from 70 to 90°C. Both n- and p-types silicon substrate were tested. Measured results show that etching changes little with the type of silicon substrate. In addition, the etching rate increases with the solution temperature but decreases with an increase in C TMAH for C TMAH greater than 8 wt.%. Among all experimental conditions, a maximum etching rate on the Si(1 0 0) surface reaches a value of 81 μm/h at a solution temperature of 90°C. Similarly, higher temperature can result in a faster etching rate of the SiO 2 surface; while the etching rate of SiO 2 surface decreases consistently with an increase in C TMAH . Measured results of surface roughness (Ra) on silicon substrate are reported after performing a 20 min etching at solution temperatures from 70 to 90°C. Much smoother substrate surfaces can be observed for higher concentrations.

Chia-Ming Hsieh

Papers

The characteristic behavior of TMAH water solution for anisotropic etching on both Silicon substrate and SiO2 layer