IEEE International Solid-State Circuits Conference

A CODEC, fabricated in 3.3-V CMOS, provides the low-voltage transmitter and receiver interfaces between the modem digital signal processing engine and the high-voltage hybrid circuitry for either the central office or the remote terminal ends of the subscriber loop, configurable by metal mask option. Extensive use of digital interpolation filters in the transmitter, decimation filters in the receiver, and oversampled data converters minimize the complexity of analog filters. On-chip filtering and 14-bit data converters support echo-canceling modems without requiring external filters. With additional external filters, frequency-division duplexing is also supported. The die area is 67.5 mm/sup 2/. The power dissipation in the central office and remote terminal are 600 and 760 mW, respectively.

Codec for echo-canceling, full-rate ADSL modems

An ADSL central office transmission system for transmitting downstream DMT signals to a plurality of remote ADSL transceiver is disclosed. The system includes a DMT digital signal transceiver that generates a time division multiplexed digital signal that includes a plurality of DMT signals to be sent on a plurality of ADSL lines. A digital to analog converter converts the time division multiplexed digital signal into a time division multiplexed analog signal that includes a plurality of analog DMT signals. The analog to digital converter has an output that outputs the time division multiplexed analog signal. A switch selectively connects the output of the digital to analog converter to each of a plurality of transmitters. The transmitters are configured to drive the plurality of ADSL lines. Thus, the plurality ADSL lines are driven by the plurality of analog DMT signals.

Multiplexed codec for an adsl system

An analog front-end IC with integrated line driver for an ADSL system is presented. The IC contains all analog functions including gain-controlled transmit- and receive-amplifiers, highly linear continuous-time low pass filters including on-chip automatic tuning, 14 bit ADC and DAC as well as a digitally controlled crystal oscillator. The IC has been fabricated in a mixed-signal 0.6 µm DPTM BiCMOS technology with a chip area of 29mm2and a power consumption of only 800mW, using 3.3V supply for all blocks except 12V supply for the line driver.

http://ieeexplore.ieee.org/iel5/9920/31529/01471347.pdf

An ADSL-RT full-rate analog frontend IC with integrated line driver

A CMOS central office codec that supports Full Rate and G.Lite asymmetric digital subscriber line (ADSL) transmission is described. The transmit channel consists of application-dependent digital filters, a 14-bit, 8.832-MSample/s current steering DAC, a 1.104-MHz analog filter, and a programmable attenuator. Due to extensive on-chip digital signal processing, the codec complies with the ADSL transmit power spectral density standards without external filtering. The receive channel contains -17.5 to 33.5 dB of programmable gain staggered strategically across three stages, a 138-kHz analog low-pass filter, a 14-bit, 2.208-MSample/s pipeline ADC, and a digital 138-kHz low-pass filter. The receive channel has a wide input range that can accommodate large line voltages present at the line hybrid circuit. The IC occupies 55.2 mm/sup 2/ and dissipates 450 mW from a 3.3-V supply.

A CMOS ADSL codec for central office applications

Asymmetric digital subscriber line (ADSL) technology meets the need for high-bandwidth communications to the home utilizing the existing twisted-pair copper. In an ADSL modem, noise and linearity of the analog front end (AFE) are critical to the data rate achievable over the longest lines (up to and above 18 kfeet of AWG24 wire) and hence the fraction of installed lines over which ADSL service can be deployed. In multitone ADSL, dynamic linearity throughout the band determines modem capacity. This highly-integrated CMOS AFE is compatible with both the full ADSL T1E1.413 DMT standard and the emerging G.lite standard, and achieves 14 b linearity in both RX and TX paths and input-referred noise better than -160 dBm/Hz, from a single 5.0 V supply. These noise and linearity specifications are necessary for an ADSL modem to operate at 1.5 Mb/s on the longest lines and reach >90% of installed copper connections.

D. Flynn

Papers

A CMOS analog front-end IC for DMT ADSL