D
David P. Schultz
Researcher at Xilinx
Publications - 55
Citations - 1413
David P. Schultz is an academic researcher from Xilinx. The author has contributed to research in topics: Programmable logic device & Control reconfiguration. The author has an hindex of 21, co-authored 55 publications receiving 1413 citations.
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Patent
Method and structure for configuring FPGAS
TL;DR: An FPGA configuration circuit including a bus interface for applying a bit stream from either a JTAG interface or an input/output block (IOB) interface onto a bus is described in this paper.
Patent
FPGA configuration circuit including bus-based CRC register
TL;DR: In this paper, a cyclic redundancy check (CRC) register is connected to the bi-directional bus and a packet processor in a configuration circuit of an FPGA.
Patent
Configuration bus interface circuit for FPGAs
TL;DR: A bus interface circuit for a programmable logic device (PLD) including an interface multiplexer connected between two or more external communication circuits and a configuration memory array is described in this article.
Patent
Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfiguration
Vasisht Mantra Vadi,David P. Schultz,John D. Logue,John C. McGrath,Anthony J. Collins,F. Erich Goetting +5 more
TL;DR: In this article, a reconfiguration port in communication with a controller is provided for sub-frame bit access for reconfiguring a logic block of a programmable logic device.
Patent
Reconfiguration port for dynamic reconfiguration
Vasisht Mantra Vadi,David P. Schultz,John D. Logue,John C. McGrath,Anthony J. Collins,F. Erich Goetting +5 more
TL;DR: In this paper, the authors describe a method and apparatus for dynamic configuration of function block logic of an integrated circuit, including a reconfiguration port coupled to a controller and an array of memory cells.