In the realization of a logical function by a network of threshold components, one important engineering parameter is the tolerances which must be placed on the coefficients and threshold of the individual components. For threshold gates in which the logical ``zero'' corresponds to a constant signal of zero value and in which the coefficients are all positive or all negative, these tolerances are functions only of the gap boundaries of the map realized by the component. A set of theorems is presented that define ``algebraic-like'' operations which provide a means for performing a sequence of symbolic operations on the desired logical function whereby the latter is transformed into a description of a network of threshold components which is its realization. Using these theorems a procedure is given for realizing an arbitrary logical function as a network of threshold components with specified sensitivity.

Realization ofLogical Functions byaNetwork ofThreshold Components with Specified Sensitivity

In the present paper efforts have been made to arrive at the three-level NAND network of any general Boolean function by utilizing its complementary function. It has been shown that the knowledge of the complementing gates of the three-level NAND circuit with minimum number of gates in the AND level can readily be obtained from the study of the prime implicants of the complementary function. A reduced form of the Cover and Closure (CC) table is suggested which is applicable in the above three-level NAND network synthesis. The paper also deals with the recognition of the class of functions for which the use of the CC table may be avoided to obtain the same network.

Complementary Function Approach to the Synthesis of Three-Level NAND Network

In this paper, we investigate the problem of stability of time-varying stochastic perturbed singular systems by using Lyapunov techniques under the assumption that the initial conditions are consistent. Sufficient conditions on uniform exponential stability and practical uniform exponential stability in mean square of solutions of stochastic perturbed singular systems are obtained based upon Lyapunov techniques. Furthermore, we study the problem of stability and stabilization of some classes of stochastic singular systems. Finally, we provide numerical examples to validate the effectiveness of the main results of this paper.

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New stability criteria for stochastic perturbed singular systems in mean square

Global reduction to the Kronecker canonical form of a Cr-family of time-invariant linear systems

Publisher Summary Logic design in designing computers generally means the design of a logic network, with prespecified types of logic gates, that realizes a given logic function. This chapter provides an overview of the research on automated logic synthesis, the design of minimal logic networks by integer programming, the transduction method for the design of NOR logic networks, the logic design of MOS networks, and SYLON—the new Logic-Synthesis system. Minimal networks do not necessarily lead to the most compact layout on a chip, but minimal or near-minimal networks generally would lead to the most compact layouts. Because of the progress of the VLSI technology, a single chip can be packed with an enormous number of transistors. The transduction method is based on the following: design of an initial network, reduction of a network, transformation of a network, and repetition of reduction and transformation. The significance of the transduction method is the introduction of the basic concept whereby local and/or global transformation and reduction were repeatedly applied to initial networks at a time when initial networks with simple transformations based on certain connection patterns were considered to be the final result of the logic design. Future computers will consist of a far larger number of logic gates than present ones. Faced only recently with the formidable task of designing networks with such a large number of logic gates, the computer industry has no choice but to use automated logic synthesis. This is just the beginning of extensive use of automated logic synthesis, and will need many years to improve it in numerous aspects, such as computational efficiency, capability of handling logic networks of ever-increasing size, quality of designed networks, and types of electronic circuits.

Computer-aided logic synthesis for VLSI chips

The present paper is concerned with the problem of three-level economic NAND synthesis of general Boolean functions. It is shown that a. given Boolean function is first decomposed into a set of sub-functions, called φ functions. From a study of the properties of φ functions a method is finally suggested for three-level synthesis of Boolean functions with a fewer number of NAND gates. A method of finding the minimal three-level NAND solution for a given irredundant prime implicant cover of any Boolean function is also suggested.

Some Studies on the Problem of Three-level NAND Network Synthesis

A method for testing and realization of threshold functions through classification of inequalities is suggested in the present paper. The standard procedure of testing and realization of threshold functions consists in solving a system of linear inequalities in which the unknowns are the different weights to be assigned to the variables of the functions. In the paper it is first shown that when the different inequalities involving the weights of the variables are represented in terms of their subscripts only, thon, depending on the number and on the sum of the subscripts appearing on either side, the entire set of inequalities of any function can be classified into nine distinct types. The sot of inequalities is next expressed in terms of the least weight and the other different incremental weights, the knowledge of which along with that of the types of inequalities, furnishes information regarding I-realizability of the function and on the assignments of values to the different weights for integ...

A Method for Testing and Realization of Threshold Functions through Classification of Inequalities

In this paper a method of testing and realization of two-realizable threshold functions have been suggested. It is shown that the two–realizable functions may be factored into three different forms, (i) sum of or (ii) product of or (iii) ‘ sum–of–product ’ of threshold functions. Since threshold functions are unate functions, a method of decomposition of Boolean functions into unate functions in the above three forms is suggested. The concept of minimal unate function and the cover table of the given Boolean function und its complement is utilized to obtain the above three factored forms.

Decomposition of Boolean function and two-realizability†

A simple and straightforward procedure for finding absolute minimal third-order expressions (in the ‘ sum-of-product-of-sum’ forms) of a special class of Boolean functions called unate functions is suggested in the paper. The central idea developed through the procedure involves a decomposition of the assigned Boolean function first into a group of sub-functions called maximal uniliteral sub-functions (MTJL's) each of which is realizable in a minimal second-order ‘ product-of-sum ’ form and then a selection of an appropriate sub-set of these maximal uniliteral sub-functions or MUL's (or their sub-functions) in order to cover all the prime implicants of the function minimally.

Minimal Third-order Expressions of Boolean Unate Functions

A method for testing and zero-order integral minimal realization of threshold functions using a reduced set of the total number of inequalities is suggested in the present paper. The paper utilizes the concept of essential second-order incremental weights and other basic ideas developed in an earlier paper by the authors (Choudhury et al. 1966). It is first shown that the information regarding the essentiality of the second-order incremental weights and some of the ordering relations necessary for testing linear separability of a function can be obtained from a knowledge of the ordering relations existing between only some specific pairs of coefficient combinations called the standard test set, which relations can, in turn, be readily obtained from a consideration of only a sub-set of the set of total number of inequalities of the function. On the basis of this, it is next shown that a zero-order integral minimal realization of the function can be obtained by using only a reduced set of the total...

Debabrata Sarma

Papers

Some Studies on the Problem of Three-level NAND Network Synthesis

A Method for Testing and Realization of Threshold Functions through Classification of Inequalities

Decomposition of Boolean function and two-realizability†

Minimal Third-order Expressions of Boolean Unate Functions

Standard test set for testing and realization of threshold functions