Showing papers by "Dilip V. Sarwate published in 2000"
01 Dec 2000
TL;DR: A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.
Abstract: A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.
4 citations
25 Jun 2000
TL;DR: This work describes several suboptimal schemes for parallel noncoherent acquisition in DS/SS communications systems and describes the results of simulation results and performance analysis.
Abstract: Acquisition is a very important step in DS/SS communications systems. We describe several suboptimal schemes for parallel noncoherent acquisition. Simulation results and performance analysis are also summarized.