A control circuit of a surgical device is disclosed. The control circuit includes a first circuit portion coupled to at least one switch operable between an open state and a closed state. The first circuit portion communicates with a surgical generator over a conductor pair to receive a control signal to determine a state of the at least one switch.

Surgical generator for ultrasonic and electrosurgical devices

A surgical instrument. The surgical instrument may comprise a transducer and an end effector. The transducer may be configured to provide vibrations along a longitudinal axis at a predetermined frequency and may comprise a piezoelectric stack positioned along the longitudinal axis. The transducer also may comprise a first metallic end mass positioned along the longitudinal axis adjacent a first end of the piezoelectric stack and a second metallic end mass positioned along the longitudinal axis adjacent a second end of the piezoelectric stack. The length of the transducer may be greater than or equal to of one wavelength and less than ½ of one wavelength. The end effector may be coupled to the transducer and may extend along the longitudinal axis. The length of the transducer and the end effector may be a multiple of ½ of one wavelength.

Ultrasonic surgical instruments

An ultrasonic surgical assembly includes an ultrasonic transducer operable to convert a received motional current into a movement of a cutting blade of an ultrasonic waveguide, a measurement circuit connected in a parallel configuration with the ultrasonic transducer, a variable power source operable to supply current through a set of connection points to the parallel configuration and thereby create the motional current in the ultrasonic transducer, and a current controller operable to regulate the motional current by varying an output of the variable power source, thereby maintaining a substantially constant rate of movement of the cutting blade across a variety of cutting loads.

Cordless hand-held ultrasonic cautery cutting device

An apparatus may include a semiconductor chip and a fluidics assembly. The semiconductor chip has an array of wells and an array of sensors and each sensor of the array of sensors is in fluid communication with a well of the array of wells. The fluidics assembly is located on top of the semiconductor chip and is configured to deliver fluids to the semiconductor chip. The fluidics assembly includes a flow expansion chamber configured to introduce the fluids, an outlet portion configured to pipe out the fluids, and a flow chamber portion. The flow chamber portion is configured to allow the fluids to flow from the flow expansion chamber to the outlet portion and to allow the fluids to interact along the way with material in the array of wells. The flow expansion chamber has a curved wall at the top or bottom so that the height of the flow expansion chamber at the center is less than at the walls that restrict the fluids to the left and right.

Methods and apparatus for measuring analytes using large scale fet arrays

Various embodiments described herein are directed to ultrasonic blades. For example, an ultrasonic blade may comprise a proximally positioned straight section extending along a longitudinal axis and a distally positioned curved section coupled to the straight section and curved away from the longitudinal axis. The curved section may define a radius of curvature and subtend a first angle. A point of tangency between the curved section and the straight section may be positioned at either a node of the ultrasonic blade or an anti-node of the ultrasonic blade.

Surgical instruments with articulating shafts

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink

A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i.e., the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i.e., at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping). The stacked configuration of the transistor groupings enable the RF switch to withstand RF signals of varying and increased power levels. The asymmetrically stacked transistor grouping RF switch facilitates area-efficient implementation of the RF switch in an integrated circuit. Maximum input and output signal power levels can be withstood using a reduced number of stacked transistors.

Symmetrically and asymmetrically stacked transistor group RF switch

A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge

A circuit and method for controlling charge injection in a circuit are disclosed In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated In one embodiment, the charge injection control elements comprise resistors In another embodiment, the charge injection control elements comprise transistors A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated

Circuit and method for controlling charge injection in radio frequency switches

A novel RF switch for switching radio frequency (RF) signals is disclosed. The RF switch may comprise both enhancement and depletion mode field-effect transistors (E-FETs and D-FETs) implemented as a monolithic integrated circuit (IC) on a silicon-on-insulator (SOI) substrate. The disclosed RF switch, with a novel bleeder circuit, may be used in RF applications wherein a selected switch state and performance are required when the switch and bleeder circuits are not provided with operating power (i.e., when the switch and bleeder circuits are “unpowered”).

Dylan J. Kelly

Papers

Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink

Symmetrically and asymmetrically stacked transistor group RF switch

Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge

Circuit and method for controlling charge injection in radio frequency switches

Unpowered switch and bleeder circuit