A taxonomy is presented that extends M.J. Flynn's (IEEE Trans.Comput., vol. C-21, no.9, p.948-60, Sept. 1972), especially in the multiprocessor category. It is a two-level hierarchy in which the upper level classifies architectures based on the number of processors for data and for instructions and the interconnections between them. A lower level can be used to distinguish variants even more precisely; it is based on a state-machine view of processors. The author suggests why taxonomies are useful in studying architecture and shows how this applies to a number of modern architectures. >

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A taxonomy for computer architectures

The design of high-level microprogramming languages poses problems t~hat are not ordinarily encountered in the software domain. Some of the more important are the phenomenon of microparallelism, the need for microcode optimization, the variability in computer microarchitectures, and, above all, the inherent machine-specificity of microprograms. These problems are discussed within a general architectural framework and a number of strategies and language design philosophies for solving them are described. They include machine-oriented languages such as Eckhouse's MPL [ECKH71] and Patterson's STRUM [PATT76]; DeWitt's EMPL, an extensible language [DEWI76a]; VMPL, an abstract machine-independent language designed by Malik and Lewis [MALI78]; and the microprogramming language schema S* proposed by Dasgnpta [DASG78]. The structure of S* is described in some detail.

Some Aspects of High-Level Microprogramming

A dilemma skirting the discipline of computer architecture concerns the plausibility of architectural designs. To counter the widely held perception that architecture is a nebulous entity is a proposal to view such designs as specifications of constraints to be satisfied.

A plausibility-driven approach to computer architecture design

Computer architectures may be characterized by their operational principle and their physical structure. The paper defines these two characteristics for the novel concept of data structure architectures (DSAs). The representation and processing of arbitrary data structures in such a DSA is demonstrated by examples. It is shown how the functional requirements of a DSA can be satisfied by the specific information structure and the physical structure of the STARLET architecture introduced in preceding publications.

Data structure architectures - a major operational principle

N. mPc, a design tool for multi-processor systems, consists of six components which work together to produce functional register transfer level simulations of multiple processor, heterogeneous target systems. A meta assembler allows the user to specify the format, nmemonics, and associated bit patterns of target instruction sets. Instruction nmemonics are mapped into bit strings and output in a machine independent control/memory allocation graph. A generalized linking loader resolves the machine dependent aspects of assembler output graphs, links, and allocates the resulting image to physical memory according to user specified strategies. A hardware description language , ISP', compiler is used to translate processor and interconnection element descriptions into executable code. This code, the linking loader outputs, and a description of the target system topology are linked by an Ecologist and Simulated Memory Processor into a simulation model which runs under the control of a Runtime Package. The Runtime Package consists of a Command Interpreter, Kernel, and Simulated Memory Manager. The Kernel and Command Interpreter permit interactive control and monitoring of simulations. The Simulated Memory Manager supervises the simulated memory contents, available physical memory, and mass storage to optimize the performance of the simulation. N. mPc is implemented on a PDP-11 system under the UNIX operating system and is currently undergoing system test and evaluation.

An Introduction to the N. mPc Design Environment

The purpose of this paper is to describe the concepts, definitions, and ideas of computer architecture and to suggest that architecture can be viewed as composed of three components: physical organization; control and flow of information; and representation, interpretation and transformation of information. This framework can accommodate diverse architectural concepts such as array processing, mieroprogramming, stack processing and tagged architecture. Architectures of some existing machines are considered and methods of associating architectural concepts with the components are established. Architecture design problems and trade-offs are discussed in terms of the proposed framework.

E. A. Feustel

Papers

A Conceptual Framework for Computer Architecture