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E.R.R. Kato

Researcher at Federal University of São Carlos

Publications -  34
Citations -  368

E.R.R. Kato is an academic researcher from Federal University of São Carlos. The author has contributed to research in topics: Scheduling (production processes) & Petri net. The author has an hindex of 10, co-authored 33 publications receiving 343 citations. Previous affiliations of E.R.R. Kato include University of São Paulo.

Papers
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Journal ArticleDOI

Analysis of open CNC architecture for machine tools

TL;DR: The development of open architecture controllers in the OSACA, OMAC, HOAM-CNC and OSEC architectures is described and the characteristics of the CNC and the microcomputer are combined.
Journal ArticleDOI

A new approach to solve the flexible job shop problem based on a hybrid particle swarm optimization and Random-Restart Hill Climbing

TL;DR: This research presents the resolution of the FJSP multi-objective, using a hierarchical approach that divides the problem into two sub-problems, being the Particle Swarm Optimization (PSO) responsible for resolving the routing sub-problem, and Random Restart Hill Climbing (RRHC) for theresolution of scheduling sub- problem.
Proceedings ArticleDOI

Image convolution processing: A GPU versus FPGA comparison

TL;DR: In this article, convolution was implemented in each of the aforementioned architectures with the following languages: CUDA for GPUs and Verilog for FPGAs, and the same algorithms were also implemented in MATLAB, using predefined operations and in C using a regular x86 quad-core processor.
Journal ArticleDOI

A genetic programming based system for the automatic construction of image filters

TL;DR: A new proposal for constructing image filters using an evolutionary programming approach, which has been implemented as the IFbyGP software, which aims at the direct use of induced sequences of operations by hardware devices.
Proceedings ArticleDOI

Intelligent FPGA based system for shape recognition

TL;DR: The development of a novel reconfigurable hardware using a genetic algorithm and a pipeline architecture is proposed for the task of shape recognition in binary images, based on FPGAs.