E
Eiichi Okuno
Researcher at Denso
Publications - 81
Citations - 1337
Eiichi Okuno is an academic researcher from Denso. The author has contributed to research in topics: Layer (electronics) & Silicon carbide. The author has an hindex of 17, co-authored 81 publications receiving 1314 citations.
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Patent
Silicon carbide semiconductor device
TL;DR: In this paper, a silicon-carbide semiconductor device (101) has a main electrode (52), a first barrier layer (70a), and a wiring layer (60), which is made from a conductive material that does not contain aluminum.
Patent
Method of manufacturing silicon carbide semiconductor device
TL;DR: In this paper, a method of manufacturing a silicon carbide semiconductor device having a MOS structure is described, which involves preparing a substrate made of silicon carbides, and forming a channel region, a first impurity region, second impurity regions, a gate insulation layer, and a gate electrode to form a semiconductor element on the substrate.
Patent
Silicon carbide semiconductor device and manufacturing method of the same
TL;DR: A SiC semiconductor device includes: a substrate, a drift layer on a first side of the substrate; a trench in the drift layer; a base region contacting a sidewall of the trench; a source region in an upper portion of the base region; a gate electrode in the trench via a gate insulation film; a Source electrode on the source region; and a drain electrode on a second side of a substrate.
Patent
SiC semiconductor having junction barrier schottky device
Eiichi Okuno,Takeo Yamamoto +1 more
TL;DR: In this paper, the second conductive type layers and the drift layer are separated from each other, and each second layer has a depth larger than the RESURF layer, which provides a PN diode.
Patent
Silicon carbide semiconductor device including deep layer
Kensaku Yamamoto,Eiichi Okuno +1 more
TL;DR: In this article, a silicon carbide semiconductor device includes a substrate, a drift layer located on a first surface of the substrate and a base region located on the drift layer, a source region located at the base region, a trench sandwiched by each of the base regions to the drift layers, a channel layer located in the trench, a gate insulating layer on the channel layer, an external source electrode electrically coupled with the source region and the sink region, and a drain electrode located at a second surface on the substrate.