Most artificial intelligence research investigates intelligent behavior for a single agent--solving problems heuristically, understanding natural language, and so on. Distributed Artificial Intelligence (DAI) is concerned with coordinated intelligent behavior: intelligent agents coordinating their knowledge, skills, and plans to act or solve problems, working toward a single goal, or toward separate, individual goals that interact. DAI provides intellectual insights about organization, interaction, and problem solving among intelligent agents. This comprehensive collection of articles shows the breadth and depth of DAI research. The selected information is relevant to emerging DAI technologies as well as to practical problems in artificial intelligence, distributed computing systems, and human-computer interaction. 

"Readings in Distributed Artificial Intelligence" proposes a framework for understanding the problems and possibilities of DAI. It divides the study into three realms: the natural systems approach (emulating strategies and representations people use to coordinate their activities), the engineering/science perspective (building automated, coordinated problem solvers for specific applications), and a third, hybrid approach that is useful in analyzing and developing mixed collections of machines and human agents working together. 

The editors introduce the volume with an important survey of the motivations, research, and results of work in DAI. This historical and conceptual overview combines with chapter introductions to guide the reader through this fascinating field. A unique and extensive bibliography is also provided.

Readings in Distributed Artificial Intelligence

Despite decades of research in extensible operating system technology, extensions such as device drivers remain a significant cause of system failures. In Windows XP, for example, drivers account for 85% of recently reported failures.This article describes Nooks, a reliability subsystem that seeks to greatly enhance operating system (OS) reliability by isolating the OS from driver failures. The Nooks approach is practical: rather than guaranteeing complete fault tolerance through a new (and incompatible) OS or driver architecture, our goal is to prevent the vast majority of driver-caused crashes with little or no change to the existing driver and system code. Nooks isolates drivers within lightweight protection domains inside the kernel address space, where hardware and software prevent them from corrupting the kernel. Nooks also tracks a driver's use of kernel resources to facilitate automatic cleanup during recovery.To prove the viability of our approach, we implemented Nooks in the Linux operating system and used it to fault-isolate several device drivers. Our results show that Nooks offers a substantial increase in the reliability of operating systems, catching and quickly recovering from many faults that would otherwise crash the system. Under a wide range and number of fault conditions, we show that Nooks recovers automatically from 99% of the faults that otherwise cause Linux to crash.While Nooks was designed for drivers, our techniques generalize to other kernel extensions. We demonstrate this by isolating a kernel-mode file system and an in-kernel Internet service. Overall, because Nooks supports existing C-language extensions, runs on a commodity operating system and hardware, and enables automated recovery, it represents a substantial step beyond the specialized architectures and type-safe languages required by previous efforts directed at safe extensibility.

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Improving the reliability of commodity operating systems

EROS is a capability-based operating system for commodity processors which uses a single level storage model. The single level store's persistence is transparent to applications. The performance consequences of support for transparent persistence and capability-based architectures are generally believed to be negative. Surprisingly, the basic operations of EROS (such as IPC) are generally comparable in cost to similar operations in conventional systems. This is demonstrated with a set of microbenchmark measurements of semantically similar operations in Linux.The EROS system achieves its performance by coupling well-chosen abstract objects with caching techniques for those objects. The objects (processes, nodes, and pages) are well-supported by conventional hardware, reducing the overhead of capabilities. Software-managed caching techniques for these objects reduce the cost of persistence. The resulting performance suggests that composing protected subsystems may be less costly than commonly believed.

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EROS: a fast capability system

A general trend in computers today is to increase the complexity of architectures commensurate with the increasing potential of implementation technologies, as exemplified by the complex successors of simpler machines. Compare, for example, the DEC VAX-11 to the PDP-1 1, the IBM System/382 to the System/3, and the Intel iAPX-4323'4 to the 8086. The complexity of this class of computers, which we call CISCs for complex instruction set computers, has some negative consequences: increased design time, increased design errors, and inconsistent implementations.5 Investigations of VLSI architectures indicate that the delay-power penalty of data transfers across chip boundaries and the still-limited resources (devices) available on a single chip are major design limitations. Even a million-transistor chip is insufficient if a whole computer has to be built from it.6 This raises the question of whether the extra hardware needed to implement a CISC is the best use of \"scarce\" resources. The above findings led to the Reduced Instruction Set Computer Project. The purpose of the RISC Project is to explore alternatives to the general trend toward architectural complexity. The hypothesis is that by reducing the instruction set one can design a suitable VLSI architecture that uses scarce resources more effectively than a CISC. We also expect this approach to reduce design time, design errors, and the execution time of individual instructions. Our initial version of such a computer is called RISC I. To meet our goals of simplicity and effective single-chip implementation, we somewhat artificially placed the following design constraints on the architecture: (1) Execute one instruction per cycle. RISC I instructions should be about as fast and no more complicated than microinstructions in current machines such as the PDP-ll or VAX. (2) Make all instructions the same size. This again simplifies implementation. We intentionally postponed attempts to reduce program size. (3) Access memory only with load and store instructions ; the rest operate between registers. This restriction simplifies the design. The lack of complex addressing modes also makes it easier to restart instructions. (4) Support high-level languages. The degree of support is explained below. Our intent is to optimize the performance of RISC I for use with high-level languages. RISC I supports 32-bit addresses, 8-, 16-, and 32-bit data, and several 32-bit registers. We intend to examine support for operating systems and floating-point calculations in the future. It would appear that these constraints, based on our desire for simplicity and regularity, …

A vlsi risc

This article explores memory sharing and protection support in Opal, a single-address-space operating system designed for wide-address (64-bit) architectures. Opal threads execute within protection domains in a single shared virtual address space. Sharing is simplified, because addresses are context independent. There is no loss of protection, because addressability and access are independent; the right to access a segment is determined by the protection domain in which a thread executes. This model enables beneficial code-and data-sharing patterns that are currently prohibitive, due in part to the inherent restrictions of multiple address spaces, and in part to Unix programming style.We have designed and implemented an Opal prototype using the Mach 3.0 microkernel as a base. Our implementation demonstrates how a single-address-space structure can be supported alongside of other environments on a modern microkernel operating system, using modern wide-address architectures. This article justifies the Opal model and its goals for sharing and protection, presents the system and its abstractions, describes the prototype implementation, and reports experience with integrated applications.

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Sharing and protection in a single-address-space operating system

The architecture study …begins in Chapter 4 where a number of topics related to object structures and object addressing are treated. Chapter 5 introduces the hardware and system software support for interprocess communication. Here the i432 Port Objects and port operations (SEND, RECEIVE, etc.) are introduced and illustrated. Chapter 6 revisits the architectural and Ada-language support for object structure, emphasizing type management and access control. Many features of the supporting operating system, known as iMAX, especially several of its important “user-interfaces,” are introduced beginning with Chapter 5. The importance of input/output peripheral subsystems and their relationship with the central object-based architecture of the i432 system is recognized by treating this topic separately in Chapter 7. This chapter introduces the reader to the architecture of the i432 Interface Processor and its use as a key component in the Peripheral Subsystem Interface for the Intel 432 System. A message-based model for input/output using this interface is also introduced, along with a discussion of abstractions for I/O device interfaces, both asynchronous and synchronous. The topics of process management, memory management, and object filing, which ma y be of primary interest to system developers and architects, are treated in Chapters 8, 9, and 10. Each chapter describes the iMAX implementations of these services and the user interfaces to these facilities. In the case of process management an iMAX provided “template” is described whose use enab les system programmers to implement their own process managers as needed. Chapter 9 describes the extensive memory management facilities of iMAX and the supporting hardware. These include facilities to support the stack and heap memory resources required, for example, by executing Ada programs. In addition, memory management supports an on-the-fly garbage collector, dynamic memory compaction, and, where configured, a virtual memory management subystem. Chapter 10, as already noted, provides a complete introduction to object filing as it is currently planned. —From the Author's Summary

A Programmer's View of the Intel 432 System

Concurrent p rocessor supercomputers are yet ano ther emerg ing real i ty to be reckoned with in prepar ing appropr iate curr icula for the remainder of the 1980s and beyond. Old prob lems need to be revisi ted and re fo rmu la ted fo r so lut ion on concur ren t comput ing systems. Such systems will soon be marketed. For tunate ly fo r us, learning to exp lo i t and teach the use of concurrent computer systems is exci t ing and reward ing work. At least one new book present ing concur rent a lgor i thms fo r wel l known problems, aimed at graduate students and faculty, wil l be appear ing short ly; it and s imi lar books are l ikely t o t r igger a new wave of text and course deve lopment ta i lored fo r undergraduates. The conclusion is inescapable that concurrent compute r sys tems and the i r use are another essential and at t ract ive facet of the compute r phenomenon, and ano ther intel lectual chal lenge set before us all. Fortunately, " th inking concur ren t l y " is fun! key words: concurrent a lgor i thms, concurrent processing, concur ren t p rogramming, hypercube architecture

Elliot I. Organick

Papers

A Programmer's View of the Intel 432 System

Algorithms, concurrent processors, and computer science education: or, “think concurrently or capitulate?”