Recent advances in flow-based microfluidic biochips have enabled the emergence of lab-on-a-chip devices for bimolecular recognition and point-of-care disease diagnostics. However, the adoption of flow-based biochips is hampered today by the lack of computer-aided design tools. Manual design procedures not only delay product development but they also inhibit the exploitation of the design complexity that is possible with current fabrication techniques. In this paper, we present the first practical problem formulation for automated control-layer design in flow-based microfluidic very large-scale integration (mVLSI) biochips and propose a systematic approach for solving this problem. Our goal is to find an efficient routing solution for control-layer design with a minimum number of control pins. The pressure-propagation delay, an intrinsic physical phenomenon in mVLSI biochips, is minimized in order to reduce the response time for valves, decrease the pattern set-up time, and synchronize valve actuation. Two fabricated flow-based devices and six synthetic benchmarks are used to evaluate the proposed optimization method. Compared with manual control-layer design and a baseline approach, the proposed approach leads to fewer control pins, better timing behavior, and shorter channel length in the control layer.

Control-Layer Routing and Control-Pin Minimization for Flow-Based Microfluidic Biochips

Fully Programmable Valve Array (FPVA) has emerged as a new architecture for the next-generation flow-based microfluidic biochips. This 2D-array consists of regularly-arranged valves, which can be dynamically configured by users to realize microfluidic devices of different shapes and sizes as well as interconnections. Additionally, the regularity of the underlying structure renders FPVAs easier to integrate on a tiny chip. However, these arrays may suffer from various manufacturing defects such as blockage and leakage in control and flow channels. Unfortunately, no efficient method is yet known for testing such a general-purpose architecture. In this paper, we present a novel formulation using the concept of flow paths and cut-sets, and describe an ILP-based hierarchical strategy for generating compact test sets that can detect multiple faults in FPVAs. Simulation results demonstrate the efficacy of the proposed method in detecting manufacturing faults with only a small number of test vectors.

Testing microfluidic Fully Programmable Valve Arrays (FPVAs)

This article presents a new concept for designing on-chip storage and cache that will enable efficient management of intermediate fluid samples during transportation and for reuse. By minimizing channel conflicts and recognizing maximum independent sets, storage requirements are efficiently handled jointly by channels as well as by both distributed and dedicated storage cells.

Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips

Flow-based microfluidic biochips have attracted much attention in the EDA community due to their miniaturized size and execution efficiency Previous research, however, still follows the traditional computing model with a dedicated storage unit, which actually becomes a bottleneck of the performance of biochips In this paper, we propose the first architectural synthesis framework considering distributed storage constructed temporarily from transportation channels to cache fluid samples Since distributed storage can be accessed more efficiently than a dedicated storage unit and channels can switch between the roles of transportation and storage easily, biochips with this distributed computing architecture can achieve a higher execution efficiency even with fewer resources Experimental results confirm that the execution efficiency of a bioassay can be improved by up to 28% while the number of valves in the biochip can be reduced effectively

Transport or Store?: Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage

This article is a tutorial on continuous-flow biochips where the basic building blocks are microchannels, and microvalves, and by combining them, more complex units such as mixers, switches, and multiplexers can be built. It also presents the state of the art in flow-based biochip technology and emerging research challenges in the areas of physical design and testing techniques.

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Continuous-Flow Biochips: Technology, Physical-Design Methods, and Testing

Recent advances in flow-based microfluidics have led to the emergence of biochemistry-on-a-chip as a new paradigm in clinical diagnostics and biomolecular recognition. However, a potential roadblock in the deployment of microfluidic biochips is the lack of test techniques to screen defective devices before they are used for biochemical analysis. Defective chips lead to repetition of experiments, which is undesirable due to high reagent cost and limited availability of samples. Prior work on fault detection in biochips has been limited to digital (“droplet”) microfluidics and other electrode-based technology platforms. The paper proposes the first approach for automated testing of flow-based microfluidic biochips that are designed using membrane-based valves for flow control. The proposed test technique is based on a behavioral abstraction of physical defects in microchannels and valves. The flow paths and flow control in the microfluidic device are modeled as a logic circuit composed of Boolean gates, which allows test generation to be carried out using standard automatic test pattern generation tools. The tests derived using the logic circuit model are then mapped to fluidic operations involving pumps and pressure sensors in the biochip. Feedback from pressure sensors can be compared to expected responses based on the logic circuit model, whereby the types and positions of defects are identified. We show how a fabricated biochip can be tested using the proposed method, and demonstrate experimental results for two additional fabricated chips.

https://ir.nctu.edu.tw:443/bitstream/11536/123974/1/000344529700003.pdf

Feiqiao Yu

Papers

Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration