A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

Fabrication process of semiconductor package and semiconductor package

An IC chip assembly (10), e.g. of the TAB-type, includes a chip (16) having an array of exposed contacts at a first face thereof, a substrate (12) having an array of exposed contacts at a face thereof and a compliant interposer (26) with exposed contacts at opposite faces thereof positioned between the chip and substrate so that contacts on the opposite faces of the interposer engage the contacts on said chip and substrate, respectively. A heat transfer member (28) contacts the opposite face of the chip and is engaged to the substrate so as to compress the interposer thereby simultaneously establishing relatively low inductance electrical connections between the chip contacts and the substrate contacts and good thermal contact between the chip and the thermal transfer member.

Method of packaging and powering integrated circuit chips and the chip assembly formed thereby

An integrated impedance matching circuit is disclosed using a flip chip process and a heterlithic microwave integrated circuit (HMIC). In a preferred embodiment, a silicon microwave power transistor is flip chip mounted on a glass substrate having a ground plane and silicon pedestals 404 selectively etched and having glass disposed about the silicon pedestals to form the substrate. The glass substrate of the present invention is finely ground and polished to enable VLSI techniques for mass production fabrication. To this end, photolithography and deposition techniques well-known in the art are utilized to effect impedance matching circuitry. Because the input impedance of the Si power transistor is relatively low, by using the flip chip technique the precision of the impedance matching circuit can be effected without the use of wire bonds which must be tuned in a labor intensive manner. Finally, the silicon pedestals of the present invention are used as an electrical ground for the common base as well and as a thermal sink for the system.

Heterolithic microwave integrated impedance matching circuitry and method of manufacture

A high efficiency RF power amplifier is disclosed in which a field effect transistor is operated in a class F mode. A third harmonic quarterwave open circuit transmission line stub having a Z O adjusted to provide capacitance series resonant with transistor inductance at the second harmonic is coupled to the transistor output lead to produce a low impedance at the channel drain of the transistor. Parallel resonance of the transistor die capacitance and interconnect inductance coupled to ground by the transmission line produces a third harmonic high impedance at the channel drain. Further lowpass output matching circuitry provides a constantly increasing impedance magnitude from the transistor die to the load and provides load mismatch isolation to the second and third harmonic impedances at the channel drain.

High efficiency RF power amplifier

A micromachined insulative carrier substrate preferably formed of silicon and a multi-chip module formed from the micromachined substrate. The micromachined substrate is fabricated by forming mesas across the surface of the substrate, forming an insulating layer on the substrate, and forming conductive traces on the insulating layer to route signals between semiconductor dice and/or to external circuitry. A variety of semiconductor dice and/or integrated circuitry-bearing wafer configurations (collectively, "semiconductor elements") may be attached to the semiconductor substrate. Electrical contact between the carrier substrate and semiconductor element is achieved with conductive connectors formed on either the semiconductor element or the carrier substrate. The conductive connectors each preferably make contact with both a portion of the conductive trace extending down the sidewall of the mesa and a portion of the conductive trace on the substrate between the mesas to form a more effective bond. The present invention also includes a stacked configuration. After attachment of semiconductor elements, the carrier substrates can be stacked to form a high density stacked configuration.

Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming

A microwave power circuit includes a thermally conductive, electrically insulating substrate such as beryllium oxide which has a relatively rough surface, a layer of dielectric material such as glass on a portion of the rough surface which layer has a relatively smooth surface, a conductive material on the relatively smooth surface, and a heat dissipating amplifying device having at least two terminals, one of which is connected to the conductive material and one of which is thermally connected to the substrate in a manner to pass heat thereto.

Microwave power circuit with an active device mounted on a heat dissipating substrate

A field effect transistor (FET) is comprised of a plurality of unit transistors having a common gallium arsenide substrate with an N-type active region. Each unit transistor is comprised of a unit gate, a unit drain and a unit source. The FET is mounted in a flip-chip carrier that connects all of the unit sources together to form a first electrode of the FET. Additionally, the first electrode is connected to ground by the carrier. All of the unit drains are connected together on the substrate to form a second electrode of the FET. The FET is reverse biased to cause a current to flow from the first electrode to the second electrode, whereby the first and second electrodes are a drain and a source, respectively, of the FET.

Franco N. Sechi

Papers

Microwave power circuit with an active device mounted on a heat dissipating substrate

Microwave FET power circuit