Mask preparation stages are crucial in mask manufacturing, since this mask is to later act as a template for
considerable number of dies on wafer. Defects on the initial blank substrate, and subsequent cleaned and coated
substrates, can have a profound impact on the usability of the finished mask. This emphasizes the need for early and
accurate identification of blank substrate defects and the risk they pose to the patterned reticle.
While Automatic Defect Classification (ADC) is a well-developed technology for inspection and analysis of
defects on patterned wafers and masks in the semiconductors industry, ADC for mask blanks is still in the early stages of
adoption and development. Calibre ADC is a powerful analysis tool for fast, accurate, consistent and automatic
classification of defects on mask blanks. Accurate, automated classification of mask blanks leads to better usability of
blanks by enabling defect avoidance technologies during mask writing. Detailed information on blank defects can help to
select appropriate job-decks to be written on the mask by defect avoidance tools [1][4][5].
Smart algorithms separate critical defects from the potentially large number of non-critical defects or false
defects detected at various stages during mask blank preparation. Mechanisms used by Calibre ADC to identify and
characterize defects include defect location and size, signal polarity (dark, bright) in both transmitted and reflected
review images, distinguishing defect signals from background noise in defect images. The Calibre ADC engine then uses
a decision tree to translate this information into a defect classification code. Using this automated process improves
classification accuracy, repeatability and speed, while avoiding the subjectivity of human judgment compared to the
alternative of manual defect classification by trained personnel [2].
This paper focuses on the results from the evaluation of Automatic Defect Classification (ADC) product at MP
Mask Technology Center (MPMask). The Calibre ADC tool was qualified on production mask blanks against the manual
classification. The classification accuracy of ADC is greater than 95% for critical defects with an overall accuracy of
90%. The sensitivity to weak defect signals and locating the defect in the images is a challenge we are resolving. The
performance of the tool has been demonstrated on multiple mask types and is ready for deployment in full volume mask
manufacturing production flow. Implementation of Calibre ADC is estimated to reduce the misclassification of critical
defects by 60-80%.

Automatic classification of blank substrate defects

In an advanced IC fab, reticle inspection issues are critical as even one killer defect on the reticle can potentially affect thousands of wafers. Human errors such as defect mis-classification may lead to 70% of reticle issues that may affect production efficiency or even impact yield. With the adoption of RET techniques like aggressive OPC and SRAF combined with increasing MEEF and smaller defects, reticle dispositioning is becoming even harder and very time consuming in production. Even an experienced engineer may make a mistake especially when dealing with 40nm and below design nodes. The concept of automation to prevent mistakes in operation has been promoted for many years but a comprehensive solution which covers intelligent task assignment and auto reticle dispositioning in volume production has been missing. Working together with KLA, USCXM proposed a detailed methodology to overcome the above difficulties. From the very beginning, USCXM used Systematic Auto Recipe Creation (SARC) to create recipes for reticle inspections even before the reticles arrived in the fab. Also, an “OHT taxi mode” to improve pod utilization combined with the Reticle Management System (RMS) decision tree algorithm intelligently determined reticle inspection frequency based on wafer requirement and tool redundancy. Finally, USCXM automated final reticle dispositioning steps, such as, auto-releasing or auto-holding the reticle based on KLA’s Reticle Analyzer (RA) results. The overall implementation resulted in 25% improvement in inspection capacity and 50% reduction in operational cost compared to the traditional flow. Further, 92% accuracy for reticle auto-dispositioning was achieved with zero under-estimation. This integrated flow has proven to be invaluable for USCXM and is now deployed in full volume reticle manufacturing production.

Demonstrating the value of integrated reticle automation solutions in high volume wafer fab manufacturing

Mask-shops developing advanced reticles for use in high-volume semiconductor manufacturing generate an abundance of critical data. Most of this data is generated in the backend of the mask production line where critical dimensions (CDs), registration and defect inspections are performed, and the general emphasis of this data collection is to confirm that the mask meets certain required specifications. Some of the results gathered are also used to monitor the front-end of line processing steps like mask write, develop, etch and clean. However, with most data being disparate and staying local to the tools where they were gathered, very little gets used beyond the immediate need to disposition the mask for shipment. This extensive data, when effectively stored and analyzed, helps not only accelerate time-to-results for mask disposition but also substantially improve monitoring of the frontend process and root-cause analyses. This paper discusses requirements for an effective data management system (DMS) capable of centralizing all maskshop data. This involves not only centralizing blank and pattern defect inspection results and the associated review SEM, repair, and AIMSTM disposition data but also CD, registration and other metrology data collected. The DMS architecture needs to support connectivity and use of data from other databases in the maskshop which include production tracking, computational application results, tool and fab environment logs, etc. After centralizing the data and establishing linkage to other databases, the system needs to provide visualizations through user-interfaces and advanced analytics that are easy for use by both production and engineering. The paper introduces the new KlearViewTM mask DMS system from KLA and discusses it’s features and deployment into advanced mask manufacturing. While quintessential to maskshop operations, the DMS also serves as a bridge to reticle requalification and wafer inspection and metrology data critical to improving mask quality and qualification necessary for achieving optimal EUV lithography cost-of-ownership.

Need for comprehensive reticle data management and analytics

At advanced technology nodes mask complexity has been increased because of large-scale use of resolution enhancement technologies (RET) which includes Optical Proximity Correction (OPC), Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO). The number of defects detected during inspection of such mask increased drastically and differentiation of critical and non-critical defects are more challenging, complex and time consuming. Because of significant defectivity of EUVL masks and non-availability of actinic inspection, it is important and also challenging to predict the criticality of defects for printability on wafer. This is one of the significant barriers for the adoption of EUVL for semiconductor manufacturing. Techniques to decide criticality of defects from images captured using non actinic inspection images is desired till actinic inspection is not available. High resolution inspection of photomask images detects many defects which are used for process and mask qualification. Repairing all defects is not practical and probably not required, however it’s imperative to know which defects are severe enough to impact wafer before repair. Additionally, wafer printability check is always desired after repairing a defect. AIMS TM review is the industry standard for this, however doing AIMSTM review for all defects is expensive and very time consuming. Fast, accurate and an economical mechanism is desired which can predict defect printability on wafer accurately and quickly from images captured using high resolution inspection machine. Predicting defect printability from such images is challenging due to the fact that the high resolution images do not correlate with actual mask contours. The challenge is increased due to use of different optical condition during inspection other than actual scanner condition, and defects found in such images do not have correlation with actual impact on wafer. Our automated defect simulation tool predicts printability of defects at wafer level and automates the process of defect dispositioning from images captured using high resolution inspection machine. It first eliminates false defects due to registration, focus errors, image capture errors and random noise caused during inspection. For the remaining real defects, actual mask-like contours are generated using the Calibre® ILT solution [1][2], which is enhanced to predict the actual mask contours from high resolution defect images. It enables accurate prediction of defect contours, which is not possible from images captured using inspection machine because some information is already lost due to optical effects. Calibre’s simulation engine is used to generate images at wafer level using scanner optical conditions and mask-like contours as input. The tool then analyses simulated images and predicts defect printability. It automatically calculates maximum CD variation and decides which defects are severe to affect patterns on wafer. In this paper, we assess the printability of defects for the mask of advanced technology nodes. In particular, we will compare the recovered mask contours with contours extracted from SEM image of the mask and compare simulation results with AIMS TM for a variety of defects and patterns. The results of printability assessment and the accuracy of comparison are presented in this paper. We also suggest how this method can be extended to predict printability of defects identified on EUV photomasks.

ILT based defect simulation of inspection images accurately predicts mask defect printability on wafer

Comprehensive disposition of reticle defects is critical for process and yield control. Misjudging a real defect on mask may not only reduce its lithography process window but also kill thousands of wafers causing unbearable economic loss. With the development of OPC and ILT technology, manual judgement of reticle defects has become more challenging. The situation is even worse in advanced logic fab, especially for foundry, where pattern complexity and diversity vary from worldwide fabless upstream firms. Working with KLA, USCXM adopted and reported ADC (Automated Defect Classification) and DPM (Defect Progressing Monitor) solutions to avoid defect misclassification and to alarm defects degrading [1]. These solutions run smoothly and shorten the cycle time in daily routine production. However, both functions cannot well predict the defect printability on wafer when there are questionable mask defects. Usually, the problematic mask has to be sent back to mask shop, where an AIMSTM tool evaluates printing risk, leading to a very time-consuming verification cycle. Thus, a cutting-edge technology called LPR (Lithography Printability Review) has been fully qualified and applied in a logic foundry for the first time. Using the optical mask inspection images, with LPR, the aerial image CD error can be accurately modeled thereby eliminating possibility of any related yield loss, while also dramatically shortening the cycle time for verifying such defects. In this paper, we introduce a series of strict qualification processes for LPR adoption. The qualification flow involves both PDM (Programmed Defect Mask) and production mask with respective purpose. The PDM verification covers various defect types while the production mask provides abundant pattern geometry. The LPR vs AIMSTM simulation efficiency is over 90% without missing one killer defect. Furthermore, LPR operates as part of an integrated solution with ADC and DPM. Typical production cases are also presented in this paper to demonstrate its invaluable contribution to avoiding yield loss. The RA (Reticle Analyzer) product including ADC, DPM and LPR, is the only mature solution, and is now deployed in full volume mask manufacturing production, driving intelligent automation with zero misoperation, shortened cycle time, and increased fab productivity.

Lithography printability review: the ultimate step in reticle analyzer to avoid killer mask defects in wafer fab manufacturing

Patterned masks require requalification at wafer fabrication plants. Periodic inspections are done at the wafer fab to identify any new defects, such as haze and contamination, which develop or get added on the mask due to their usage and the way they are handled. These defects, if not monitored over time, may result in mask defects that print on the wafer. It is thus mandatory to identify and fix them in their early stages. Repeated inspections, coupled with higher sensitivity inspections employed at wafer fabs, result in a large number of defects reported, which includes many small and faint defects. However, some of these small and faint defects need detailed operator review time, due to their potential to grow and have a larger impact later. Efficiency of classification includes both speed and accuracy. For a manual review, accuracy is primarily affected by consistency, arising due to the bulk and monotonous nature of classification task affected by human fatigue. The requirement for higher accuracy however, necessitates increased operator review and analysis time. Increased operator review time translates to the amount of time a mask in not used for printing wafers, i.e. productivity loss. Calibre® DefectClassify™ tool enables automatic classification of defects by employing stable algorithms to ensure consistency and accuracy, while algorithm efficiency ensures adequate speed. The tool thus aids in improving the throughput and yield at wafer fabs. The tool reads defect images, analyzes image properties to extract potential defect regions, processes the regions to identify actual defects and classifies them. This paper mainly focuses on the challenges faced in characterization and classification of defects from images reported by the inspection machine. The primary difference between analyzing inspections at wafer fab and mask shop is the availability of layout data. Unavailability of layout data complicates the tasks of identifying different pattern regions on the mask, especially assist features. With advanced technology nodes, the number of assist features present is higher while the features themselves get smaller in size. These features, if not identified correctly, may be mistaken as defects. Other than that, single die defects are a category that gets affected due to lack of layout information. Without a reference to compare with, these defects require separate sets of rules to be applied to images for their identification and classification. In particular, identification of defects on pattern edges and corners from single die images is challenging without a reference image.

Frank Cm Wu

Papers

Demonstrating the value of integrated reticle automation solutions in high volume wafer fab manufacturing

Automatic classification of patterned mask defects for requalification at wafer fabs in absence of layout data

Lithography printability review: the ultimate step in reticle analyzer to avoid killer mask defects in wafer fab manufacturing