Lowering the processing temperature is a crucial factor in the development of flexible electronic devices. Here we report the fabrication of high-performance OFETs based on room temperature deposited Ba0.5Sr0.5TiO3 (BST) as a high-k dielectric layer. The fabricated devices exhibited excellent performance while operating at a low voltage of -3 V along with demonstrating high operational stability when tested for 1 h bias stress and continuous transfer measurement cycles. In addition, inverter circuit performance is also investigated with these devices by connecting them to external loads.

Low Voltage Organic Field-Effect Transistors with Room Temperature Deposited Dielectric Layer

In this work, solution-processed low voltage organic field-effect transistors (OFETs) are demonstrated using P(VDF-TrFE) as the primary gate dielectric with TIPS-Pentacene: Polystyrene (PS) blend on top, providing an active layer. Maximum field-effect mobility of ~0.6 cm2 V−1s−1 with an average of ~ 0.4 (±0.1) cm2 V−1s−1 in saturation region and high Ion/Ioff value of ~104 were achieved from these devices at an operating voltage of -5V. Moreover, these devices exhibited excellent electrical stability upon multiple scans of transfer characteristics and under bias-stress. A deterioration in the performance of OFETs was observed upon annealing at temperatures over 50 °C.

Gargi Konwar

Papers

Low Voltage Organic Field-Effect Transistors with Room Temperature Deposited Dielectric Layer

Effect of Annealing on Low-Voltage Organic Field-Effect Transistors with P(VDF-TrFE) Gate Dielectric