The present invention is embodied in an apparatus, and related method, for detecting and recognizing an object in an image frame. The object may be, for example, a head having particular facial characteristics. The object detection process uses robust and computationally efficient techniques. The object identification and recognition process uses an image processing technique based on model graphs and bunch graphs that efficiently represent image features as jets. The jets are composed of wavelet transforms and are processed at nodes or landmark locations on an image corresponding to readily identifiable features. The system of the invention is particularly advantageous for recognizing a person over a wide variety of pose angles.

Face recognition from video images

The present invention is embodied in an apparatus, and related method, for sensing a person's facial movements, features and characteristics and the like to generate and animate an avatar image based on facial sensing. The avatar apparatus uses an image processing technique based on model graphs and bunch graphs that efficiently represent image features as jets. The jets are composed of wavelet transforms processed at node or landmark locations on an image corresponding to readily identifiable features. The nodes are acquired and tracked to animate an avatar image in accordance with the person's facial movements. Also, the facial sensing may use jet similarity to determine the person's facial features and characteristic thus allows tracking of a person's natural characteristics without any unnatural elements that may interfere or inhibit the person's natural characteristics.

Wavelet-based facial motion capture for avatar animation

An apparatus and method for real-time volume processing and universal three-dimensional rendering. The apparatus includes a plurality of three-dimensional (3D) memory units (24); at least one pixel bus for providing global horizontal communication (34); a plurality of rendering pipelines; at least one geometry bus (46); and a control unit (38). The apparatus includes a block processor having a circular ray integration pipeline for processing voxel data and ray data. Rays are generally processed in image order thus permitting great flexibility (e.g., perspective projection, global illumination). The block processor includes a splatting unit and a scattering unit. A method for casting shadows and performing global illumination in relation to light sources, which includes sweeping a two dimensional array of rays through the volume, can also be implemented with the apparatus. A method for approximating a perspective projection includes using parallel projection.

Apparatus and method for volume processing and rendering

A terminal receives data from a storage device that stores data indicating a topic about which information is sought or with reference to which some transaction is desired. The terminal initiates an exchange with a network server and the terminal by transmitting the data received from the storage device. If an indication is made at the terminal that either a further exchange is not desired or that the terminal cannot presently connect with the server, the data from the storage device is saved in a memory for later use in conducting the further exchange. Various options attending this context include providing for the delivery of information by an alternate channel and other options.

Machine readable label system with offline capture and processing

A method is described for representing a treatment site (10) of a patient as data suitable for use with a computer-aided design device (46). The method includes scanning the treatment site(10) with a scanning apparatus (40), such as a CT scanner, to produce image data; determining the image data that represents the surface of the item; generating vectors from the determined data; and associating the vectors with poles of a non-uniform rational B-spline so that a polynomial equation may be generated, which is a data form suitable for use with CAD devices.

Method for representing a patient's treatment site as data for use with a CAD or CAM device

A method for displaying three dimensional imaging system data uses a modified Back To Front algorithm. With that algorithm, imaging system data are interpolated and converted into a series of vectors defined by a starting point in space and a length corresponding to consecutive non-zero imaging system data points. The vectors are transformed to an observer's viewpoint coordinate system and plotted on a CRT display.

Modified back-to-front three dimensional reconstruction algorithm

A computer system includes sixteen data processors each connected to a communication bus. The communication bus comprises a data bus for carrying data, and an address bus for carrying associated labelling information uniquely identifying the data. Each processor includes read and write detectors connected to the address bus for detecting labelling information of data required by, or presently stored in, respectively, the data processor. A bulk memory having similar read and write detectors is connected to the communication bus. An address generator supplies labelling addresses to the address bus. For each address, one processor or the bulk memory supplies the corresponding data to the data bus, and other processors and/or the bulk memory requiring the data read the data from the data bus. Data is transferred between processors and/or the bulk memory in this way. The address bus and the read and write decoders are configured for multi-dimensional addressing.

Computer system using multidimensional addressing between multiple processors having independently addressable internal memory for efficient reordering and redistribution of data arrays between the processors

Apparatus for synchronising a plurality of independent video signal generators comprises a first input ( 12 ) for receiving field or frame synchronising signals from a first video signal generator, a second input ( 14 ) for receiving field or frame synchronising signals from a second video signal generator, a comparator ( 13 ) for comparing the phase of the first and second synchronisation signals, a master clock generator ( 1 ), a slave clock generator ( 4 ), the slave clock generator ( 4 ) having a frequency different from that of the master clock generator ( 1 ), means for applying the master clock signal to a first output ( 7 ) for application to the first video signal generator, means for applying the slave clock signal to a second output ( 9 ) for application to the second video signal generator, and means ( 5 ) for means for applying the master clock signal to the second output ( 9 ) in place of the slave clock signal when the synchronising signals from the first and second synchronising signals are in phase. A second comparator ( 3 ) is provided for comparing the phase of the master clock ( 1 ) and the slave clock ( 4 ) so that the operation of the means ( 5 ) for applying the master clock ( 1 ) to the second output ( 9 ) is dependent also on the master ( 1 ) and slave ( 4 ) clocks being in phase.

Synchronising a plurality of independent video signal generators

A system for sequentially providing external circuit data for an external circuit comprising: a memory having a plurality of memory locations identified by addresses, each memory location containing an instruction comprising external circuit data and memory location data, the memory further comprising an address input terminal for currently accessing one of the memory locations in response to receipt of the address for that memory location at the address input terminal; a sequencer, coupled to the memory to receive memory location data from the currently addressed one of the memory locations, for selecting the address of another of the memory locations in response to the next memory location data; a first register, coupled between the sequencer and the address input terminal of the memory to receive the address of the other of the memory locations from the sequencer for storing the address selected by the sequencer to make the address available at the address input terminal of the memory to access the other of the memory locations, after the storing; and a second register, coupled between the memory and the external circuit, for storing the external circuit data of the currently accessed memory location for use, after the storing, by the external circuit. A related method is also provided.

System for providing data for an external circuit and related method

A computer system (30) includes sixteen data processors (32a....32p) each connected to a communication bus (36). The communication bus (36) comprises a data bus (40) for carrying data, and an address bus (38) for carrying associated labelling information uniquely identifying the data. Each processor (32) includes read and write detectors (52) connected to the address bus (38) for detecting labelling information of data required by, or presently stored in, respectively, the data processor (32). A bulk memory (44) having similar read and write detectors (46) is connected to the communication bus (36). An address generator (32) supplies labelling addresses to the address bus (38). For each address, one processor (32) or the bulk memory (44) supplies the corresponding data to the data bus (40), and other processors and/or the bulk memory requiring the data read the data from the data bus (40). Data is transferred between processors and/or the bulk memory in this way. The address bus (38) and the read and write decoders (52, 46) are configured for multi-dimensional addressing.

Geoffrey Lawrence Thiel

Papers

Modified back-to-front three dimensional reconstruction algorithm

Computer system using multidimensional addressing between multiple processors having independently addressable internal memory for efficient reordering and redistribution of data arrays between the processors

Synchronising a plurality of independent video signal generators

System for providing data for an external circuit and related method

Multi processor computer system