A modulator for modulating an incident beam of light, the modulator comprising a plurality of equally spaced-apart elements, each of which includes a light-reflective planar surface. The elements are arranged parallel to each other with their light-reflective surfaces parallel to each other. The modulator includes means for supporting the elements in relation to one another and means for moving particular ones of the elements relative to others so that the moved elements transit between a first configuration wherein the modulator acts to reflect the incident beam of light as a plane mirror, and a second configuration wherein the modulator diffracts the light reflected therefrom. In operation the light-reflective surfaces of the elements remain parallel to each other in both the first and second configurations. The perpendicular spacing between the reflective surfaces of the respective elements is equal to m/4 × the wavelength of the incident beam of light, wherein m equals an even whole number or zero when the elements are in the first configuration and m equals an odd whole number when the elements are in the second configuration.

Method and apparatus for modulating a light beam

A power manager within a portable laptop computer provides power and clocking control to various units within the computer in order to conserve battery power. Transistor switches controlled by the power manager control the distribution of power and/or clock signals to the various units within the computer. The power manager includes a software routine for continually monitoring the various units and when these units are either not needed and/or not currently in use, power and/or clock signals are removed from a given unit.

Power management for a laptop computer with slow and sleep modes

A display system for providing a two dimensional image includes an essentially one dimensional light valve array. The diffractive light valve array includes modulator elements which diffract or reflect light incident thereon to an extent determined by an image element to be represented. The display system is arranged such diffracted light from the light-valve array passes through a magnifying lens and is separated from the reflected light from the array. A magnified virtual image of the array formed by the diffracted light is viewed through the magnifying lens. A scanning arrangement between the viewer and the magnifying lens scans the image of the light-valve array across the field of view of the viewer sufficiently quickly that the viewer perceives the scanned image as a two-dimensional image. In another arrangement a printer is formed by scanning a real image of the diffractive light valve array over a printing or recording medium.

Display device incorporating one-dimensional grating light-valve array

A method and apparatus for configuring a computer in a low-power mode are provided. In the low-power mode, dynamic random access memory is refreshed by a battery powered system in order to maintain the memory contents. Low-power mode is entered by saving an interrupt mask and by disabling interrupts, followed by saving the DMA status, finishing DMA operations, and disabling DMA. After these steps, the I/O state of the machine is saved by saving various I/O registers and ports. A refresh of the memory is forced before the system refresh operations are discontinued.

Low-power, standby mode computer

Certain embodiments of the present invention provide an archive management application that operates within a host application to provide access to an archive and/or allow access to and/or modification of files in an archive using the host application's interface, instead of operating as a separate standalone archive management application. In an embodiment of the present invention, a file archiving system may include a user interface component, a file management component and a compression/extraction engine component. The user interface component may include an enhanced user interface of a host application that provides an interface for a user. The file management component may include a central directory that provides a representation of the contents of an archive. The compression/extraction engine component may include a file size module and/or a security module. The file size module may be used to compress and/or decompress a file in an archive. The security module may be used to encrypt, decrypt, digitally sign and/or authenticate a file in an archive.

System and method for manipulating and managing computer archive files

A calculator having constant memory utilizing a classical CMOS metal gate process, a low power microcomputer with on-chip and external constant memory capability, and multiple partition power control of circuit groups. Incorporation of a first and second switched negative voltage and a non-switched negative voltage to the appropriate P (-) wells enables the power hungry clocked logic and the display interface and keystroke detect circuitry, to be turned off while power is maintained on the internal static RAM, and on the RAM write logic, digit latches, and R-lines which connect to both the internal and external RAM, or to selectively connect in combination the first and second switched voltages. In an alternate embodiment, a multiple oscillator, multiple partition system is controlled to provide an off-mode, display only mode (low frequency oscillator), a process only mode, and a display and process mode, thereby optimizing power dissipation to system requirements. In yet another embodiment, the clocked CMOS logic of the system is forced to a designer predefined output logic level in the inactive power down mode. Thus, semi-non-volatile memory (constant memory) capability, power down standby, and display only, capabilities may be achieved. Power consumption less than conventional CMOS is obtainable.

Turn-off-processor between keystrokes

An electronic digital processor fabricated on a single MOS/LSI semiconductor chip includes an arithmetic unit operating on digits one at a time, with a carry output and a carry input. Commands for operating the processor are produced by decoding instruction words one at a time from a large instruction memory. A special status circuit is responsive to commands from instruction words to operate in several conditional modes. A carry input to the arithmetic unit is generated in response to whether carries were generated in either the current or previous digits being processed. Another status circuit provides the input for a conditional branch or call depending on whether a carry or compare logic signal is applied to the status circuit.

Digital processor system with conditional carry and status function in arithmetic unit

A method of designing and manufacturing a modular integrated circuit for a 4 bit microcomputer family utilizing a modular concept which is adaptable for a variety of applications and specific circuit desgins. The modular circuit is designed as a large block of cells which contains an ALU, instruction decoder, bus structure and a small amount of RAM and ROM as well as ROM control logic. In addition, the block contains attachment points for additional ROM and RAM and for special input/output devices such as I/O bus, timekeeping, A-D, D-A, display drive, communication ports and general purpose control lines.

Data processing system integrated circuit having modular memory add-on capacity

A digital processor which may be used in a calculator is provided by an MOS/LSI semiconductive chip which contains a bit-parallel arithmetic unit for operating on data stored in a random access memory. Selector units determine which of several sources produce the inputs to the arithmetic unit. The random access memory has X and Y, or page and word addressing. Part of the random access memory provides direct access for readout. Numerical data at the Y address in the direct access memory is always available at the selector units for input to the arithmetic unit, at the same time that data at the same Y address but another X address is read out to be also an input to the arithmetic unit. The direct access part of the memory is addressed for write in by the same addressing means as the remainder of the memory. This arrangement reduces the number of machine cycles needed for arithmetic operations, and so provides faster calculations.

Digital processor system with direct access memory

An improved CMOS device and method of making it are provided which utilize basically the standard N-channel self-aligned silicon gate structure and process, modified to include a P-channel transistor. A P-type substrate is used as the starting material, with an N-type tank formed for the P-channel transistor. Field oxide is grown after the N-type tank is formed. A polycrystalline silicon layer is deposited and patterned to create gates for both N- and P-channel transistors, then separately masked P- and N-type diffusions or implants form the sources and drains for the two types of transistors.

Graham S. Tubbs

Papers

Turn-off-processor between keystrokes

Digital processor system with conditional carry and status function in arithmetic unit

Data processing system integrated circuit having modular memory add-on capacity

Digital processor system with direct access memory

Method of making CMOS integrated circuit device