Enhanced damage at low dose rates was investigated for several different types of linear integrated circuits that were fabricated with conventional junction isolation. Although both npn and pnp transistors exhibit increased damage at low dose rate, the effect is far greater for substrate and lateral pnp transistors from these technologies. The saturation level of damage at high doses was also found to be far greater under low dose rate conditions than at high dose rates. A model for this behavior was developed that is consistent with earlier studies of MOS field oxides under low-field conditions, and accounts for the increased enhanced damage in pnp transistors.

Enhanced damage in linear bipolar integrated circuits at low dose rate

A novel parameter extraction formalism for the evaluation of heterojunction bipolar transistor (HBT) device physics is presented. The technique uses analytically derived expressions for direct calculation of the HBT T-model equivalent circuit element values in terms of the measured S-parameters. All elements are directly calculated with the exception of the emitter leg of the T-model. This approach avoids errors due to uncertainty in fitting to large, overdetermined equivalent circuits, and does not require the use of test structures and extra measurement steps to evaluate parasitics. Detailed bias-dependent results for the directly calculated circuit elements are presented. An analysis of the short circuit current gain that separates the transit times and RC products and allows evaluation of their individual contribution to the measured f/sub T/ and significance in limiting the HBT's high-frequency performance is reported. >

Evaluation of the factors determining HBT high-frequency performance by direct analysis of S-parameter data

In spite of the emergence of CMOS technology, the well-controlled characteristics of bipolar transistors retain many advantages over those of CMOS transistors for some critical analog applications. This is the reason why special technologies have been proposed to combine both types of transistors on the same chip. An inexpensive and widely applicable approach lies in using bipolars that are realisable with existing CMOS technologies. Bipolar transistors occur as parasitic devices in CMOS and it is not necessary to use additional processing steps in their manufacture. These bipolar transistors, therefore, provide cost effective devices which are relatively simple to fabricate. The extraction of a DC parameter set for the lateral device is more complicated than for a vertical device because of the presence of two parasitic vertical bipolar transistors which are formed by the emitter/collector, the base and the substrate regions. This paper proposes a method which involves the use of subcircuits incorporating three SPICE Gummel-Poon models. The development of this model, its implementation and the results obtained are outlined and discussed.

Modelling of lateral bipolar devices in a CMOS process

This paper describes a SPICE compatible subcircuit model of a lateral pnp transistor, which was fabricated in a 0.6 /spl mu/m CMOS process. The extraction of a dc parameter set for the lateral device is more complicated than for a vertical device because of the presence of two parasitic vertical bipolar transistors which are formed by the emitter/collector, the base and the substrate regions. The SPICE Gummel-Poon model does not predict the substrate current accurately. This paper proposes a method which involves the use of a subcircuit incorporating three SPICE Gummel-Poon models [representing one lateral and two parasitic vertical bipolar junction transistors (BJT's)]. The development of this model, its implementation and the results obtained are outlined and discussed. This circuit model is SPICE compatible and can thus be used in commercial simulators. The model provides good agreement over a wide range of measured dc data including substrate current prediction.

A SPICE compatible subcircuit model for lateral bipolar transistors in a CMOS process

A new approach for directly calculating the heterojunction bipolar transistor (HBT) equivalent circuit from measured S-parameters is presented. Analytically derived rather than fitted solutions are obtained in this way. Extrinsic as well as intrinsic element values are computed without the use of special test structures or additional measurement steps. Bias-dependent results for base resistance, collector resistance, base-collector capacitance, base transport factor, and base and collector transit times are discussed. >

Direct calculation of the HBT equivalent circuit from measured S-parameters

A physically based, large-signal model for the lateral p-n-p transistor is developed and compared with DC and transient measurements. The analytical equations for the lateral and vertical parts of the lateral p-n-p are derived. The analytical geometrical factor for the lateral p-n-p transistor is developed to derive a charge-based large-signal model. The partitioned-charge method is used to account for the non-quasi-static effects since the lateral p-n-p transistor has a wide base width. The simulation shows good agreement with the measurement, indicating that the PC method is sufficient for modeling the lateral p-n-p transistor without resorting to complex equations for NQS (non-quasi-static) effects. This simple model can reduce the simulation time quite a lot and help the circuit designer in estimating the effect of the parasitic lateral p-n-p for complex integrated circuit design. >

The modeling and measurement of lateral bipolar junction transistors

A simple model for distributed quasi-three-dimensional base impedance that is generally applicable for any bipolar circuit model and accounts for DC and AC base crowding is presented. It is shown to be self-consistent with parameter extraction using S-parameter measurements corrected by equivalent-circuit deembedding. >

H. Cho

Papers

The modeling and measurement of lateral bipolar junction transistors

A simple model for distributed base impedance with AC verification using S-parameter measurements