Biology-inspired neural computing is a potential candidate for the implementation of next-generation intelligent systems. Memristor is a passive electrical element with resistance-switching dynamics. Owing to its natural advantages of non-volatility, nanoscale geometries, and variable conductance, memristor can effectively simulate the synaptic connecting strength between the neurones in the multilayer neural networks. This study presents a kind of memristor synapse-based multilayer neural network hardware architecture with a suitable training methodology. Specifically, a novel dual-complementary metal-oxide-semiconductor/memristor synaptic circuit is presented, which is capable of performing the negative, zero, and positive synaptic weights via controlling the direction of current passing through the memristors. Then, the neurone circuit synthesised with multiple synaptic circuits and an activation unit is further designed, which can be utilised to constitute a compact multilayer neural network with fully connected configuration. Also, a hardware-friendly chip-in-the-loop training method is provided during the network training phase. For the verification purpose, the presented neural network is applied for the realisation of single image super-resolution reconstruction.

https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-cds.2018.5062

Hybrid dual-complementary metal–oxide–semiconductor/memristor synapse-based neural network with its applications in image super-resolution

A memristor is a nonlinear polarity-dependent fundamental circuit element. Due to these intrinsic properties of the device, analyzing a circuit that contains multiple memristors becomes complex. In this paper, we study the characteristics of multiple-memristor series (anti-series) and parallel (anti-parallel) connections, including their transient and stable state composite properties. Also, the existing phenomenological and physics-based memristor mathematical modeling techniques have been discussed for use in SPICE simulation environment. For making a standardized comparison between memristor stochastic and deterministic models, all models presented in this paper have been implemented in a single SPICE program. In addition to the well-known previously reported Joglekar and Biolek window functions, a modified Biolek window function and a novel generic scalable window function have been used to model the intrinsic nonlinearity of memristors effectively. Furthermore, electronic synapse circuits based on memristive devices in series and parallel connections and synaptic circuits based on CMOS transistor–memristor architecture have been presented and analyzed. Based on the obtained results, artificial synaptic circuit design limitation using a single memristor has been demonstrated.

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Stochastic and novel generic scalable window function-based deterministic memristor SPICE model comparison and implementation for synaptic circuit design

Scientists have dreamed of an information system with cognitive human-like skills for years. However, constrained by the device characteristics and rapidly increasing design complexity under the traditional processing technology, little progress has been made in hardware implementation. The recently popularized memristor offers a potential breakthrough for neuromorphic computing because of its unique properties including nonvolatily, extremely high fabrication density, and sensitivity to historic voltage/current behavior. In this work, we first investigate the memristor-based synapse design and the corresponding training scheme. Then, a case study of an 8-bit arithmetic logic unit (ALU) design is used to demonstrate the hardware implementation of reconfigurable system built based on memristor synapses.

Hai Helen Li

Papers

Memristor-based synapse design and a case study in reconfigurable systems